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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9f8466c6e0
When I tried booting a stih415 Dual core A9 with multi_v7_defconfig, it failed to boot. The issues seems to be changing by enabling or disabling VT8550 platform. Having a quick look at dt_compat list, it seems to miss a NULL terminator, which means of_flat_dt_match will compat check will cross the boundary of dt_compat and fault at some point , which is what was happening in my case. Without this patch if we try to boot multi_v7_defconfig you might notice that some of the platforms might fault if they fall after vt8500 in machine-desc list. Other platforms which fall before vt8500 in mdesc list will not fault. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Olof Johansson <olof@lixom.net>
188 lines
4.5 KiB
C
188 lines
4.5 KiB
C
/*
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* arch/arm/mach-vt8500/vt8500.c
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/clocksource.h>
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#include <linux/io.h>
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#include <linux/irqchip.h>
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#include <linux/pm.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include "common.h"
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#define LEGACY_GPIO_BASE 0xD8110000
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#define LEGACY_PMC_BASE 0xD8130000
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/* Registers in GPIO Controller */
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#define VT8500_GPIO_MUX_REG 0x200
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/* Registers in Power Management Controller */
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#define VT8500_HCR_REG 0x12
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#define VT8500_PMSR_REG 0x60
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static void __iomem *pmc_base;
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void vt8500_restart(char mode, const char *cmd)
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{
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if (pmc_base)
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writel(1, pmc_base + VT8500_PMSR_REG);
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}
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static struct map_desc vt8500_io_desc[] __initdata = {
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/* SoC MMIO registers */
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[0] = {
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.virtual = 0xf8000000,
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.pfn = __phys_to_pfn(0xd8000000),
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.length = 0x00390000, /* max of all chip variants */
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.type = MT_DEVICE
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},
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};
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void __init vt8500_map_io(void)
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{
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iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc));
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}
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static void vt8500_power_off(void)
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{
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local_irq_disable();
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writew(5, pmc_base + VT8500_HCR_REG);
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asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
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}
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void __init vt8500_init(void)
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{
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struct device_node *np;
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#if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505)
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struct device_node *fb;
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void __iomem *gpio_base;
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#endif
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#ifdef CONFIG_FB_VT8500
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fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
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if (fb) {
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np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio");
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if (np) {
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gpio_base = of_iomap(np, 0);
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if (!gpio_base)
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pr_err("%s: of_iomap(gpio_mux) failed\n",
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__func__);
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of_node_put(np);
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} else {
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gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
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if (!gpio_base)
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pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
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__func__);
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}
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if (gpio_base) {
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writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
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gpio_base + VT8500_GPIO_MUX_REG);
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iounmap(gpio_base);
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} else
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pr_err("%s: Could not remap GPIO mux\n", __func__);
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of_node_put(fb);
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}
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#endif
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#ifdef CONFIG_FB_WM8505
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fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb");
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if (fb) {
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np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio");
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if (!np)
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np = of_find_compatible_node(NULL, NULL,
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"wm,wm8650-gpio");
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if (np) {
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gpio_base = of_iomap(np, 0);
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if (!gpio_base)
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pr_err("%s: of_iomap(gpio_mux) failed\n",
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__func__);
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of_node_put(np);
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} else {
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gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
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if (!gpio_base)
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pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
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__func__);
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}
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if (gpio_base) {
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writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
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0x80000000, gpio_base + VT8500_GPIO_MUX_REG);
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iounmap(gpio_base);
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} else
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pr_err("%s: Could not remap GPIO mux\n", __func__);
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of_node_put(fb);
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}
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#endif
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np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
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if (np) {
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pmc_base = of_iomap(np, 0);
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if (!pmc_base)
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pr_err("%s:of_iomap(pmc) failed\n", __func__);
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of_node_put(np);
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} else {
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pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
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if (!pmc_base)
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pr_err("%s:ioremap(power_off) failed\n", __func__);
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}
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if (pmc_base)
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pm_power_off = &vt8500_power_off;
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else
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pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
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vtwm_clk_init(pmc_base);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const char * const vt8500_dt_compat[] = {
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"via,vt8500",
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"wm,wm8650",
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"wm,wm8505",
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"wm,wm8750",
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"wm,wm8850",
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NULL
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};
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DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
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.dt_compat = vt8500_dt_compat,
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.map_io = vt8500_map_io,
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.init_irq = irqchip_init,
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.init_machine = vt8500_init,
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.init_time = clocksource_of_init,
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.restart = vt8500_restart,
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MACHINE_END
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