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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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87da236ebc
A VPIPT I-cache has two main properties: 1. Lines allocated into the cache are tagged by VMID and a lookup can only hit lines that were allocated with the current VMID. 2. I-cache invalidation from EL1/0 only invalidates lines that match the current VMID of the CPU doing the invalidation. This can cause issues with non-VHE configurations, where the host runs at EL1 and wants to invalidate I-cache entries for a guest running with a different VMID. VHE is not affected, because the host runs at EL2 and I-cache invalidation applies as expected. This patch solves the problem by invalidating the I-cache when unmapping a page at stage 2 on a system with a VPIPT I-cache but not running with VHE enabled. Hopefully this is an obscure enough configuration that the overhead isn't anything to worry about, although it does mean that the by-range I-cache invalidation currently performed when mapping at stage 2 can be elided on such systems, because the I-cache will be clean for the guest VMID following a rollover event. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
158 lines
4.3 KiB
C
158 lines
4.3 KiB
C
/*
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* Copyright (C) 2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <asm/kvm_hyp.h>
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#include <asm/tlbflush.h>
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static void __hyp_text __tlb_switch_to_guest_vhe(struct kvm *kvm)
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{
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u64 val;
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/*
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* With VHE enabled, we have HCR_EL2.{E2H,TGE} = {1,1}, and
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* most TLB operations target EL2/EL0. In order to affect the
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* guest TLBs (EL1/EL0), we need to change one of these two
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* bits. Changing E2H is impossible (goodbye TTBR1_EL2), so
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* let's flip TGE before executing the TLB operation.
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*/
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write_sysreg(kvm->arch.vttbr, vttbr_el2);
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val = read_sysreg(hcr_el2);
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val &= ~HCR_TGE;
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write_sysreg(val, hcr_el2);
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isb();
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}
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static void __hyp_text __tlb_switch_to_guest_nvhe(struct kvm *kvm)
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{
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write_sysreg(kvm->arch.vttbr, vttbr_el2);
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isb();
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}
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static hyp_alternate_select(__tlb_switch_to_guest,
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__tlb_switch_to_guest_nvhe,
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__tlb_switch_to_guest_vhe,
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ARM64_HAS_VIRT_HOST_EXTN);
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static void __hyp_text __tlb_switch_to_host_vhe(struct kvm *kvm)
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{
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/*
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* We're done with the TLB operation, let's restore the host's
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* view of HCR_EL2.
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*/
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write_sysreg(0, vttbr_el2);
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write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
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}
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static void __hyp_text __tlb_switch_to_host_nvhe(struct kvm *kvm)
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{
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write_sysreg(0, vttbr_el2);
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}
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static hyp_alternate_select(__tlb_switch_to_host,
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__tlb_switch_to_host_nvhe,
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__tlb_switch_to_host_vhe,
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ARM64_HAS_VIRT_HOST_EXTN);
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void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
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{
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dsb(ishst);
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/* Switch to requested VMID */
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kvm = kern_hyp_va(kvm);
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__tlb_switch_to_guest()(kvm);
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/*
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* We could do so much better if we had the VA as well.
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* Instead, we invalidate Stage-2 for this IPA, and the
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* whole of Stage-1. Weep...
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*/
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ipa >>= 12;
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__tlbi(ipas2e1is, ipa);
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/*
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* We have to ensure completion of the invalidation at Stage-2,
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* since a table walk on another CPU could refill a TLB with a
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* complete (S1 + S2) walk based on the old Stage-2 mapping if
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* the Stage-1 invalidation happened first.
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*/
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dsb(ish);
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__tlbi(vmalle1is);
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dsb(ish);
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isb();
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/*
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* If the host is running at EL1 and we have a VPIPT I-cache,
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* then we must perform I-cache maintenance at EL2 in order for
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* it to have an effect on the guest. Since the guest cannot hit
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* I-cache lines allocated with a different VMID, we don't need
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* to worry about junk out of guest reset (we nuke the I-cache on
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* VMID rollover), but we do need to be careful when remapping
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* executable pages for the same guest. This can happen when KSM
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* takes a CoW fault on an executable page, copies the page into
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* a page that was previously mapped in the guest and then needs
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* to invalidate the guest view of the I-cache for that page
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* from EL1. To solve this, we invalidate the entire I-cache when
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* unmapping a page from a guest if we have a VPIPT I-cache but
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* the host is running at EL1. As above, we could do better if
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* we had the VA.
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*
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* The moral of this story is: if you have a VPIPT I-cache, then
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* you should be running with VHE enabled.
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*/
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if (!has_vhe() && icache_is_vpipt())
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__flush_icache_all();
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__tlb_switch_to_host()(kvm);
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}
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void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
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{
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dsb(ishst);
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/* Switch to requested VMID */
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kvm = kern_hyp_va(kvm);
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__tlb_switch_to_guest()(kvm);
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__tlbi(vmalls12e1is);
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dsb(ish);
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isb();
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__tlb_switch_to_host()(kvm);
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}
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void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm);
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/* Switch to requested VMID */
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__tlb_switch_to_guest()(kvm);
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__tlbi(vmalle1);
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dsb(nsh);
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isb();
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__tlb_switch_to_host()(kvm);
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}
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void __hyp_text __kvm_flush_vm_context(void)
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{
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dsb(ishst);
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__tlbi(alle1is);
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asm volatile("ic ialluis" : : );
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dsb(ish);
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}
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