mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9cc6f743c7
The patch was generated using fixed coccinelle semantic patch scripts/coccinelle/api/memdup.cocci. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1455612202-14414-3-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
1044 lines
24 KiB
C
1044 lines
24 KiB
C
/*
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* Intel CPU Microcode Update Driver for Linux
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*
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* Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
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* 2006 Shaohua Li <shaohua.li@intel.com>
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*
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* Intel CPU microcode early update for Linux
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*
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* Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
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* H Peter Anvin" <hpa@zytor.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/*
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* This needs to be before all headers so that pr_debug in printk.h doesn't turn
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* printk calls into no_printk().
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*
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*#define DEBUG
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*/
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#define pr_fmt(fmt) "microcode: " fmt
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#include <linux/earlycpio.h>
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#include <linux/firmware.h>
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#include <linux/uaccess.h>
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#include <linux/vmalloc.h>
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#include <linux/initrd.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/cpu.h>
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#include <linux/mm.h>
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#include <asm/microcode_intel.h>
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#include <asm/processor.h>
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#include <asm/tlbflush.h>
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#include <asm/setup.h>
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#include <asm/msr.h>
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/*
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* Temporary microcode blobs pointers storage. We note here the pointers to
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* microcode blobs we've got from whatever storage (detached initrd, builtin).
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* Later on, we put those into final storage mc_saved_data.mc_saved.
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*/
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static unsigned long mc_tmp_ptrs[MAX_UCODE_COUNT];
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static struct mc_saved_data {
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unsigned int num_saved;
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struct microcode_intel **mc_saved;
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} mc_saved_data;
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static enum ucode_state
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load_microcode_early(struct microcode_intel **saved,
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unsigned int num_saved, struct ucode_cpu_info *uci)
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{
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struct microcode_intel *ucode_ptr, *new_mc = NULL;
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struct microcode_header_intel *mc_hdr;
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int new_rev, ret, i;
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new_rev = uci->cpu_sig.rev;
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for (i = 0; i < num_saved; i++) {
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ucode_ptr = saved[i];
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mc_hdr = (struct microcode_header_intel *)ucode_ptr;
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ret = has_newer_microcode(ucode_ptr,
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uci->cpu_sig.sig,
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uci->cpu_sig.pf,
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new_rev);
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if (!ret)
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continue;
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new_rev = mc_hdr->rev;
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new_mc = ucode_ptr;
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}
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if (!new_mc)
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return UCODE_NFOUND;
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uci->mc = (struct microcode_intel *)new_mc;
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return UCODE_OK;
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}
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static inline void
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copy_ptrs(struct microcode_intel **mc_saved, unsigned long *mc_ptrs,
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unsigned long off, int num_saved)
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{
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int i;
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for (i = 0; i < num_saved; i++)
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mc_saved[i] = (struct microcode_intel *)(mc_ptrs[i] + off);
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}
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#ifdef CONFIG_X86_32
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static void
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microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mcs)
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{
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int i;
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struct microcode_intel ***mc_saved;
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mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
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for (i = 0; i < mcs->num_saved; i++) {
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struct microcode_intel *p;
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p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
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mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
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}
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}
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#endif
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static enum ucode_state
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load_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
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unsigned long offset, struct ucode_cpu_info *uci)
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{
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struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
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unsigned int count = mcs->num_saved;
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if (!mcs->mc_saved) {
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copy_ptrs(mc_saved_tmp, mc_ptrs, offset, count);
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return load_microcode_early(mc_saved_tmp, count, uci);
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} else {
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#ifdef CONFIG_X86_32
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microcode_phys(mc_saved_tmp, mcs);
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return load_microcode_early(mc_saved_tmp, count, uci);
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#else
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return load_microcode_early(mcs->mc_saved, count, uci);
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#endif
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}
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}
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/*
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* Given CPU signature and a microcode patch, this function finds if the
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* microcode patch has matching family and model with the CPU.
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*/
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static enum ucode_state
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matching_model_microcode(struct microcode_header_intel *mc_header,
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unsigned long sig)
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{
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unsigned int fam, model;
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unsigned int fam_ucode, model_ucode;
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struct extended_sigtable *ext_header;
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unsigned long total_size = get_totalsize(mc_header);
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unsigned long data_size = get_datasize(mc_header);
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int ext_sigcount, i;
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struct extended_signature *ext_sig;
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fam = x86_family(sig);
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model = x86_model(sig);
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fam_ucode = x86_family(mc_header->sig);
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model_ucode = x86_model(mc_header->sig);
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if (fam == fam_ucode && model == model_ucode)
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return UCODE_OK;
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/* Look for ext. headers: */
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if (total_size <= data_size + MC_HEADER_SIZE)
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return UCODE_NFOUND;
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ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
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ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
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ext_sigcount = ext_header->count;
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for (i = 0; i < ext_sigcount; i++) {
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fam_ucode = x86_family(ext_sig->sig);
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model_ucode = x86_model(ext_sig->sig);
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if (fam == fam_ucode && model == model_ucode)
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return UCODE_OK;
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ext_sig++;
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}
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return UCODE_NFOUND;
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}
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static int
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save_microcode(struct mc_saved_data *mcs,
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struct microcode_intel **mc_saved_src,
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unsigned int num_saved)
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{
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int i, j;
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struct microcode_intel **saved_ptr;
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int ret;
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if (!num_saved)
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return -EINVAL;
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/*
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* Copy new microcode data.
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*/
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saved_ptr = kcalloc(num_saved, sizeof(struct microcode_intel *), GFP_KERNEL);
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if (!saved_ptr)
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return -ENOMEM;
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for (i = 0; i < num_saved; i++) {
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struct microcode_header_intel *mc_hdr;
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struct microcode_intel *mc;
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unsigned long size;
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if (!mc_saved_src[i]) {
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ret = -EINVAL;
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goto err;
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}
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mc = mc_saved_src[i];
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mc_hdr = &mc->hdr;
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size = get_totalsize(mc_hdr);
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saved_ptr[i] = kmemdup(mc, size, GFP_KERNEL);
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if (!saved_ptr[i]) {
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ret = -ENOMEM;
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goto err;
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}
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}
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/*
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* Point to newly saved microcode.
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*/
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mcs->mc_saved = saved_ptr;
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mcs->num_saved = num_saved;
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return 0;
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err:
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for (j = 0; j <= i; j++)
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kfree(saved_ptr[j]);
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kfree(saved_ptr);
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return ret;
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}
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/*
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* A microcode patch in ucode_ptr is saved into mc_saved
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* - if it has matching signature and newer revision compared to an existing
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* patch mc_saved.
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* - or if it is a newly discovered microcode patch.
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*
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* The microcode patch should have matching model with CPU.
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*
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* Returns: The updated number @num_saved of saved microcode patches.
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*/
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static unsigned int _save_mc(struct microcode_intel **mc_saved,
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u8 *ucode_ptr, unsigned int num_saved)
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{
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struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
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unsigned int sig, pf;
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int found = 0, i;
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mc_hdr = (struct microcode_header_intel *)ucode_ptr;
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for (i = 0; i < num_saved; i++) {
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mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
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sig = mc_saved_hdr->sig;
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pf = mc_saved_hdr->pf;
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if (!find_matching_signature(ucode_ptr, sig, pf))
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continue;
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found = 1;
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if (mc_hdr->rev <= mc_saved_hdr->rev)
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continue;
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/*
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* Found an older ucode saved earlier. Replace it with
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* this newer one.
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*/
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mc_saved[i] = (struct microcode_intel *)ucode_ptr;
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break;
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}
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/* Newly detected microcode, save it to memory. */
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if (i >= num_saved && !found)
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mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
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return num_saved;
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}
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/*
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* Get microcode matching with BSP's model. Only CPUs with the same model as
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* BSP can stay in the platform.
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*/
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static enum ucode_state __init
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get_matching_model_microcode(unsigned long start, void *data, size_t size,
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struct mc_saved_data *mcs, unsigned long *mc_ptrs,
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struct ucode_cpu_info *uci)
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{
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struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
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struct microcode_header_intel *mc_header;
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unsigned int num_saved = mcs->num_saved;
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enum ucode_state state = UCODE_OK;
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unsigned int leftover = size;
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u8 *ucode_ptr = data;
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unsigned int mc_size;
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int i;
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while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
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if (leftover < sizeof(mc_header))
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break;
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mc_header = (struct microcode_header_intel *)ucode_ptr;
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mc_size = get_totalsize(mc_header);
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if (!mc_size || mc_size > leftover ||
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microcode_sanity_check(ucode_ptr, 0) < 0)
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break;
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leftover -= mc_size;
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/*
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* Since APs with same family and model as the BSP may boot in
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* the platform, we need to find and save microcode patches
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* with the same family and model as the BSP.
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*/
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if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != UCODE_OK) {
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ucode_ptr += mc_size;
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continue;
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}
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num_saved = _save_mc(mc_saved_tmp, ucode_ptr, num_saved);
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ucode_ptr += mc_size;
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}
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if (leftover) {
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state = UCODE_ERROR;
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return state;
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}
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if (!num_saved) {
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state = UCODE_NFOUND;
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return state;
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}
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for (i = 0; i < num_saved; i++)
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mc_ptrs[i] = (unsigned long)mc_saved_tmp[i] - start;
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mcs->num_saved = num_saved;
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return state;
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}
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static int collect_cpu_info_early(struct ucode_cpu_info *uci)
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{
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unsigned int val[2];
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unsigned int family, model;
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struct cpu_signature csig;
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unsigned int eax, ebx, ecx, edx;
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csig.sig = 0;
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csig.pf = 0;
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csig.rev = 0;
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memset(uci, 0, sizeof(*uci));
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eax = 0x00000001;
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ecx = 0;
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native_cpuid(&eax, &ebx, &ecx, &edx);
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csig.sig = eax;
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family = x86_family(csig.sig);
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model = x86_model(csig.sig);
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if ((model >= 5) || (family > 6)) {
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/* get processor flags from MSR 0x17 */
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native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
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csig.pf = 1 << ((val[1] >> 18) & 7);
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}
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native_wrmsrl(MSR_IA32_UCODE_REV, 0);
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/* As documented in the SDM: Do a CPUID 1 here */
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sync_core();
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/* get the current revision from MSR 0x8B */
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native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
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csig.rev = val[1];
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uci->cpu_sig = csig;
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uci->valid = 1;
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return 0;
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}
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static void show_saved_mc(void)
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{
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#ifdef DEBUG
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int i, j;
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unsigned int sig, pf, rev, total_size, data_size, date;
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struct ucode_cpu_info uci;
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if (!mc_saved_data.num_saved) {
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pr_debug("no microcode data saved.\n");
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return;
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}
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pr_debug("Total microcode saved: %d\n", mc_saved_data.num_saved);
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collect_cpu_info_early(&uci);
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sig = uci.cpu_sig.sig;
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pf = uci.cpu_sig.pf;
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rev = uci.cpu_sig.rev;
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pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
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for (i = 0; i < mc_saved_data.num_saved; i++) {
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struct microcode_header_intel *mc_saved_header;
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struct extended_sigtable *ext_header;
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int ext_sigcount;
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struct extended_signature *ext_sig;
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mc_saved_header = (struct microcode_header_intel *)
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mc_saved_data.mc_saved[i];
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sig = mc_saved_header->sig;
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pf = mc_saved_header->pf;
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rev = mc_saved_header->rev;
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total_size = get_totalsize(mc_saved_header);
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data_size = get_datasize(mc_saved_header);
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date = mc_saved_header->date;
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pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
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i, sig, pf, rev, total_size,
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date & 0xffff,
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date >> 24,
|
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(date >> 16) & 0xff);
|
|
|
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/* Look for ext. headers: */
|
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if (total_size <= data_size + MC_HEADER_SIZE)
|
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continue;
|
|
|
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ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
|
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ext_sigcount = ext_header->count;
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ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
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|
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for (j = 0; j < ext_sigcount; j++) {
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sig = ext_sig->sig;
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pf = ext_sig->pf;
|
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|
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pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
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j, sig, pf);
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|
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ext_sig++;
|
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}
|
|
|
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}
|
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#endif
|
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}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
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static DEFINE_MUTEX(x86_cpu_microcode_mutex);
|
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/*
|
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* Save this mc into mc_saved_data. So it will be loaded early when a CPU is
|
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* hot added or resumes.
|
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*
|
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* Please make sure this mc should be a valid microcode patch before calling
|
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* this function.
|
|
*/
|
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int save_mc_for_early(u8 *mc)
|
|
{
|
|
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
|
|
unsigned int mc_saved_count_init;
|
|
unsigned int num_saved;
|
|
struct microcode_intel **mc_saved;
|
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int ret = 0;
|
|
int i;
|
|
|
|
/*
|
|
* Hold hotplug lock so mc_saved_data is not accessed by a CPU in
|
|
* hotplug.
|
|
*/
|
|
mutex_lock(&x86_cpu_microcode_mutex);
|
|
|
|
mc_saved_count_init = mc_saved_data.num_saved;
|
|
num_saved = mc_saved_data.num_saved;
|
|
mc_saved = mc_saved_data.mc_saved;
|
|
|
|
if (mc_saved && num_saved)
|
|
memcpy(mc_saved_tmp, mc_saved,
|
|
num_saved * sizeof(struct microcode_intel *));
|
|
/*
|
|
* Save the microcode patch mc in mc_save_tmp structure if it's a newer
|
|
* version.
|
|
*/
|
|
num_saved = _save_mc(mc_saved_tmp, mc, num_saved);
|
|
|
|
/*
|
|
* Save the mc_save_tmp in global mc_saved_data.
|
|
*/
|
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ret = save_microcode(&mc_saved_data, mc_saved_tmp, num_saved);
|
|
if (ret) {
|
|
pr_err("Cannot save microcode patch.\n");
|
|
goto out;
|
|
}
|
|
|
|
show_saved_mc();
|
|
|
|
/*
|
|
* Free old saved microcode data.
|
|
*/
|
|
if (mc_saved) {
|
|
for (i = 0; i < mc_saved_count_init; i++)
|
|
kfree(mc_saved[i]);
|
|
kfree(mc_saved);
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&x86_cpu_microcode_mutex);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(save_mc_for_early);
|
|
#endif
|
|
|
|
static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
|
|
{
|
|
#ifdef CONFIG_X86_64
|
|
unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
|
|
char name[30];
|
|
|
|
native_cpuid(&eax, &ebx, &ecx, &edx);
|
|
|
|
sprintf(name, "intel-ucode/%02x-%02x-%02x",
|
|
x86_family(eax), x86_model(eax), x86_stepping(eax));
|
|
|
|
return get_builtin_firmware(cp, name);
|
|
#else
|
|
return false;
|
|
#endif
|
|
}
|
|
|
|
static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
|
|
static __init enum ucode_state
|
|
scan_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
|
|
unsigned long start, unsigned long size,
|
|
struct ucode_cpu_info *uci)
|
|
{
|
|
struct cpio_data cd;
|
|
long offset = 0;
|
|
#ifdef CONFIG_X86_32
|
|
char *p = (char *)__pa_nodebug(ucode_name);
|
|
#else
|
|
char *p = ucode_name;
|
|
#endif
|
|
|
|
cd.data = NULL;
|
|
cd.size = 0;
|
|
|
|
/* try built-in microcode if no initrd */
|
|
if (!size) {
|
|
if (!load_builtin_intel_microcode(&cd))
|
|
return UCODE_ERROR;
|
|
} else {
|
|
cd = find_cpio_data(p, (void *)start, size, &offset);
|
|
if (!cd.data)
|
|
return UCODE_ERROR;
|
|
}
|
|
|
|
return get_matching_model_microcode(start, cd.data, cd.size,
|
|
mcs, mc_ptrs, uci);
|
|
}
|
|
|
|
/*
|
|
* Print ucode update info.
|
|
*/
|
|
static void
|
|
print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
|
|
{
|
|
pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
|
|
uci->cpu_sig.rev,
|
|
date & 0xffff,
|
|
date >> 24,
|
|
(date >> 16) & 0xff);
|
|
}
|
|
|
|
#ifdef CONFIG_X86_32
|
|
|
|
static int delay_ucode_info;
|
|
static int current_mc_date;
|
|
|
|
/*
|
|
* Print early updated ucode info after printk works. This is delayed info dump.
|
|
*/
|
|
void show_ucode_info_early(void)
|
|
{
|
|
struct ucode_cpu_info uci;
|
|
|
|
if (delay_ucode_info) {
|
|
collect_cpu_info_early(&uci);
|
|
print_ucode_info(&uci, current_mc_date);
|
|
delay_ucode_info = 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* At this point, we can not call printk() yet. Keep microcode patch number in
|
|
* mc_saved_data.mc_saved and delay printing microcode info in
|
|
* show_ucode_info_early() until printk() works.
|
|
*/
|
|
static void print_ucode(struct ucode_cpu_info *uci)
|
|
{
|
|
struct microcode_intel *mc;
|
|
int *delay_ucode_info_p;
|
|
int *current_mc_date_p;
|
|
|
|
mc = uci->mc;
|
|
if (!mc)
|
|
return;
|
|
|
|
delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
|
|
current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date);
|
|
|
|
*delay_ucode_info_p = 1;
|
|
*current_mc_date_p = mc->hdr.date;
|
|
}
|
|
#else
|
|
|
|
/*
|
|
* Flush global tlb. We only do this in x86_64 where paging has been enabled
|
|
* already and PGE should be enabled as well.
|
|
*/
|
|
static inline void flush_tlb_early(void)
|
|
{
|
|
__native_flush_tlb_global_irq_disabled();
|
|
}
|
|
|
|
static inline void print_ucode(struct ucode_cpu_info *uci)
|
|
{
|
|
struct microcode_intel *mc;
|
|
|
|
mc = uci->mc;
|
|
if (!mc)
|
|
return;
|
|
|
|
print_ucode_info(uci, mc->hdr.date);
|
|
}
|
|
#endif
|
|
|
|
static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
|
|
{
|
|
struct microcode_intel *mc;
|
|
unsigned int val[2];
|
|
|
|
mc = uci->mc;
|
|
if (!mc)
|
|
return 0;
|
|
|
|
/* write microcode via MSR 0x79 */
|
|
native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
|
|
native_wrmsrl(MSR_IA32_UCODE_REV, 0);
|
|
|
|
/* As documented in the SDM: Do a CPUID 1 here */
|
|
sync_core();
|
|
|
|
/* get the current revision from MSR 0x8B */
|
|
native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
|
if (val[1] != mc->hdr.rev)
|
|
return -1;
|
|
|
|
#ifdef CONFIG_X86_64
|
|
/* Flush global tlb. This is precaution. */
|
|
flush_tlb_early();
|
|
#endif
|
|
uci->cpu_sig.rev = val[1];
|
|
|
|
if (early)
|
|
print_ucode(uci);
|
|
else
|
|
print_ucode_info(uci, mc->hdr.date);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* This function converts microcode patch offsets previously stored in
|
|
* mc_tmp_ptrs to pointers and stores the pointers in mc_saved_data.
|
|
*/
|
|
int __init save_microcode_in_initrd_intel(void)
|
|
{
|
|
unsigned int count = mc_saved_data.num_saved;
|
|
struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
|
|
int ret = 0;
|
|
|
|
if (!count)
|
|
return ret;
|
|
|
|
copy_ptrs(mc_saved, mc_tmp_ptrs, get_initrd_start(), count);
|
|
|
|
ret = save_microcode(&mc_saved_data, mc_saved, count);
|
|
if (ret)
|
|
pr_err("Cannot save microcode patches from initrd.\n");
|
|
|
|
show_saved_mc();
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __init
|
|
_load_ucode_intel_bsp(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
|
|
unsigned long start, unsigned long size)
|
|
{
|
|
struct ucode_cpu_info uci;
|
|
enum ucode_state ret;
|
|
|
|
collect_cpu_info_early(&uci);
|
|
|
|
ret = scan_microcode(mcs, mc_ptrs, start, size, &uci);
|
|
if (ret != UCODE_OK)
|
|
return;
|
|
|
|
ret = load_microcode(mcs, mc_ptrs, start, &uci);
|
|
if (ret != UCODE_OK)
|
|
return;
|
|
|
|
apply_microcode_early(&uci, true);
|
|
}
|
|
|
|
void __init load_ucode_intel_bsp(void)
|
|
{
|
|
u64 start, size;
|
|
#ifdef CONFIG_X86_32
|
|
struct boot_params *p;
|
|
|
|
p = (struct boot_params *)__pa_nodebug(&boot_params);
|
|
size = p->hdr.ramdisk_size;
|
|
|
|
/*
|
|
* Set start only if we have an initrd image. We cannot use initrd_start
|
|
* because it is not set that early yet.
|
|
*/
|
|
start = (size ? p->hdr.ramdisk_image : 0);
|
|
|
|
_load_ucode_intel_bsp((struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
|
|
(unsigned long *)__pa_nodebug(&mc_tmp_ptrs),
|
|
start, size);
|
|
#else
|
|
size = boot_params.hdr.ramdisk_size;
|
|
start = (size ? boot_params.hdr.ramdisk_image + PAGE_OFFSET : 0);
|
|
|
|
_load_ucode_intel_bsp(&mc_saved_data, mc_tmp_ptrs, start, size);
|
|
#endif
|
|
}
|
|
|
|
void load_ucode_intel_ap(void)
|
|
{
|
|
unsigned long *mcs_tmp_p;
|
|
struct mc_saved_data *mcs_p;
|
|
struct ucode_cpu_info uci;
|
|
enum ucode_state ret;
|
|
#ifdef CONFIG_X86_32
|
|
|
|
mcs_tmp_p = (unsigned long *)__pa_nodebug(mc_tmp_ptrs);
|
|
mcs_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
|
|
#else
|
|
mcs_tmp_p = mc_tmp_ptrs;
|
|
mcs_p = &mc_saved_data;
|
|
#endif
|
|
|
|
/*
|
|
* If there is no valid ucode previously saved in memory, no need to
|
|
* update ucode on this AP.
|
|
*/
|
|
if (!mcs_p->num_saved)
|
|
return;
|
|
|
|
collect_cpu_info_early(&uci);
|
|
ret = load_microcode(mcs_p, mcs_tmp_p, get_initrd_start_addr(), &uci);
|
|
if (ret != UCODE_OK)
|
|
return;
|
|
|
|
apply_microcode_early(&uci, true);
|
|
}
|
|
|
|
void reload_ucode_intel(void)
|
|
{
|
|
struct ucode_cpu_info uci;
|
|
enum ucode_state ret;
|
|
|
|
if (!mc_saved_data.num_saved)
|
|
return;
|
|
|
|
collect_cpu_info_early(&uci);
|
|
|
|
ret = load_microcode_early(mc_saved_data.mc_saved,
|
|
mc_saved_data.num_saved, &uci);
|
|
if (ret != UCODE_OK)
|
|
return;
|
|
|
|
apply_microcode_early(&uci, false);
|
|
}
|
|
|
|
static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
|
|
{
|
|
struct cpuinfo_x86 *c = &cpu_data(cpu_num);
|
|
unsigned int val[2];
|
|
|
|
memset(csig, 0, sizeof(*csig));
|
|
|
|
csig->sig = cpuid_eax(0x00000001);
|
|
|
|
if ((c->x86_model >= 5) || (c->x86 > 6)) {
|
|
/* get processor flags from MSR 0x17 */
|
|
rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
|
|
csig->pf = 1 << ((val[1] >> 18) & 7);
|
|
}
|
|
|
|
csig->rev = c->microcode;
|
|
pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
|
|
cpu_num, csig->sig, csig->pf, csig->rev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* return 0 - no update found
|
|
* return 1 - found update
|
|
*/
|
|
static int get_matching_mc(struct microcode_intel *mc, int cpu)
|
|
{
|
|
struct cpu_signature cpu_sig;
|
|
unsigned int csig, cpf, crev;
|
|
|
|
collect_cpu_info(cpu, &cpu_sig);
|
|
|
|
csig = cpu_sig.sig;
|
|
cpf = cpu_sig.pf;
|
|
crev = cpu_sig.rev;
|
|
|
|
return has_newer_microcode(mc, csig, cpf, crev);
|
|
}
|
|
|
|
static int apply_microcode_intel(int cpu)
|
|
{
|
|
struct microcode_intel *mc;
|
|
struct ucode_cpu_info *uci;
|
|
struct cpuinfo_x86 *c;
|
|
unsigned int val[2];
|
|
|
|
/* We should bind the task to the CPU */
|
|
if (WARN_ON(raw_smp_processor_id() != cpu))
|
|
return -1;
|
|
|
|
uci = ucode_cpu_info + cpu;
|
|
mc = uci->mc;
|
|
if (!mc)
|
|
return 0;
|
|
|
|
/*
|
|
* Microcode on this CPU could be updated earlier. Only apply the
|
|
* microcode patch in mc when it is newer than the one on this
|
|
* CPU.
|
|
*/
|
|
if (!get_matching_mc(mc, cpu))
|
|
return 0;
|
|
|
|
/* write microcode via MSR 0x79 */
|
|
wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
|
|
wrmsrl(MSR_IA32_UCODE_REV, 0);
|
|
|
|
/* As documented in the SDM: Do a CPUID 1 here */
|
|
sync_core();
|
|
|
|
/* get the current revision from MSR 0x8B */
|
|
rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
|
|
|
if (val[1] != mc->hdr.rev) {
|
|
pr_err("CPU%d update to revision 0x%x failed\n",
|
|
cpu, mc->hdr.rev);
|
|
return -1;
|
|
}
|
|
|
|
pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
|
|
cpu, val[1],
|
|
mc->hdr.date & 0xffff,
|
|
mc->hdr.date >> 24,
|
|
(mc->hdr.date >> 16) & 0xff);
|
|
|
|
c = &cpu_data(cpu);
|
|
|
|
uci->cpu_sig.rev = val[1];
|
|
c->microcode = val[1];
|
|
|
|
return 0;
|
|
}
|
|
|
|
static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
|
|
int (*get_ucode_data)(void *, const void *, size_t))
|
|
{
|
|
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
|
u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
|
|
int new_rev = uci->cpu_sig.rev;
|
|
unsigned int leftover = size;
|
|
enum ucode_state state = UCODE_OK;
|
|
unsigned int curr_mc_size = 0;
|
|
unsigned int csig, cpf;
|
|
|
|
while (leftover) {
|
|
struct microcode_header_intel mc_header;
|
|
unsigned int mc_size;
|
|
|
|
if (leftover < sizeof(mc_header)) {
|
|
pr_err("error! Truncated header in microcode data file\n");
|
|
break;
|
|
}
|
|
|
|
if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
|
|
break;
|
|
|
|
mc_size = get_totalsize(&mc_header);
|
|
if (!mc_size || mc_size > leftover) {
|
|
pr_err("error! Bad data in microcode data file\n");
|
|
break;
|
|
}
|
|
|
|
/* For performance reasons, reuse mc area when possible */
|
|
if (!mc || mc_size > curr_mc_size) {
|
|
vfree(mc);
|
|
mc = vmalloc(mc_size);
|
|
if (!mc)
|
|
break;
|
|
curr_mc_size = mc_size;
|
|
}
|
|
|
|
if (get_ucode_data(mc, ucode_ptr, mc_size) ||
|
|
microcode_sanity_check(mc, 1) < 0) {
|
|
break;
|
|
}
|
|
|
|
csig = uci->cpu_sig.sig;
|
|
cpf = uci->cpu_sig.pf;
|
|
if (has_newer_microcode(mc, csig, cpf, new_rev)) {
|
|
vfree(new_mc);
|
|
new_rev = mc_header.rev;
|
|
new_mc = mc;
|
|
mc = NULL; /* trigger new vmalloc */
|
|
}
|
|
|
|
ucode_ptr += mc_size;
|
|
leftover -= mc_size;
|
|
}
|
|
|
|
vfree(mc);
|
|
|
|
if (leftover) {
|
|
vfree(new_mc);
|
|
state = UCODE_ERROR;
|
|
goto out;
|
|
}
|
|
|
|
if (!new_mc) {
|
|
state = UCODE_NFOUND;
|
|
goto out;
|
|
}
|
|
|
|
vfree(uci->mc);
|
|
uci->mc = (struct microcode_intel *)new_mc;
|
|
|
|
/*
|
|
* If early loading microcode is supported, save this mc into
|
|
* permanent memory. So it will be loaded early when a CPU is hot added
|
|
* or resumes.
|
|
*/
|
|
save_mc_for_early(new_mc);
|
|
|
|
pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
|
|
cpu, new_rev, uci->cpu_sig.rev);
|
|
out:
|
|
return state;
|
|
}
|
|
|
|
static int get_ucode_fw(void *to, const void *from, size_t n)
|
|
{
|
|
memcpy(to, from, n);
|
|
return 0;
|
|
}
|
|
|
|
static enum ucode_state request_microcode_fw(int cpu, struct device *device,
|
|
bool refresh_fw)
|
|
{
|
|
char name[30];
|
|
struct cpuinfo_x86 *c = &cpu_data(cpu);
|
|
const struct firmware *firmware;
|
|
enum ucode_state ret;
|
|
|
|
sprintf(name, "intel-ucode/%02x-%02x-%02x",
|
|
c->x86, c->x86_model, c->x86_mask);
|
|
|
|
if (request_firmware_direct(&firmware, name, device)) {
|
|
pr_debug("data file %s load failed\n", name);
|
|
return UCODE_NFOUND;
|
|
}
|
|
|
|
ret = generic_load_microcode(cpu, (void *)firmware->data,
|
|
firmware->size, &get_ucode_fw);
|
|
|
|
release_firmware(firmware);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int get_ucode_user(void *to, const void *from, size_t n)
|
|
{
|
|
return copy_from_user(to, from, n);
|
|
}
|
|
|
|
static enum ucode_state
|
|
request_microcode_user(int cpu, const void __user *buf, size_t size)
|
|
{
|
|
return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
|
|
}
|
|
|
|
static void microcode_fini_cpu(int cpu)
|
|
{
|
|
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
|
|
|
vfree(uci->mc);
|
|
uci->mc = NULL;
|
|
}
|
|
|
|
static struct microcode_ops microcode_intel_ops = {
|
|
.request_microcode_user = request_microcode_user,
|
|
.request_microcode_fw = request_microcode_fw,
|
|
.collect_cpu_info = collect_cpu_info,
|
|
.apply_microcode = apply_microcode_intel,
|
|
.microcode_fini_cpu = microcode_fini_cpu,
|
|
};
|
|
|
|
struct microcode_ops * __init init_intel_microcode(void)
|
|
{
|
|
struct cpuinfo_x86 *c = &boot_cpu_data;
|
|
|
|
if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
|
|
cpu_has(c, X86_FEATURE_IA64)) {
|
|
pr_err("Intel CPU family 0x%x not supported\n", c->x86);
|
|
return NULL;
|
|
}
|
|
|
|
return µcode_intel_ops;
|
|
}
|
|
|