mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 12:34:55 +07:00
915d3eecfa
Use HMM helper function hmm_vma_fault() to get physical pages backing userptr and start CPU page table update track of those pages. Then use hmm_vma_range_done() to check if those pages are updated before amdgpu_cs_submit for gfx or before user queues are resumed for kfd. If userptr pages are updated, for gfx, amdgpu_cs_ioctl will restart from scratch, for kfd, restore worker is rescheduled to retry. HMM simplify the CPU page table concurrent update check, so remove guptasklock, mmu_invalidations, last_set_pages fields from amdgpu_ttm_tt struct. HMM does not pin the page (increase page ref count), so remove related operations like release_pages(), put_page(), mark_page_dirty(). Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
234 lines
8.2 KiB
C
234 lines
8.2 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */
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#ifndef AMDGPU_AMDKFD_H_INCLUDED
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#define AMDGPU_AMDKFD_H_INCLUDED
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/workqueue.h>
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#include <kgd_kfd_interface.h>
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#include <drm/ttm/ttm_execbuf_util.h>
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#include "amdgpu_sync.h"
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#include "amdgpu_vm.h"
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extern uint64_t amdgpu_amdkfd_total_mem_size;
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struct amdgpu_device;
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struct kfd_bo_va_list {
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struct list_head bo_list;
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struct amdgpu_bo_va *bo_va;
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void *kgd_dev;
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bool is_mapped;
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uint64_t va;
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uint64_t pte_flags;
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};
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struct kgd_mem {
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struct mutex lock;
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struct amdgpu_bo *bo;
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struct list_head bo_va_list;
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/* protected by amdkfd_process_info.lock */
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struct ttm_validate_buffer validate_list;
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struct ttm_validate_buffer resv_list;
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uint32_t domain;
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unsigned int mapped_to_gpu_memory;
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uint64_t va;
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uint32_t mapping_flags;
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atomic_t invalid;
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struct amdkfd_process_info *process_info;
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struct amdgpu_sync sync;
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bool aql_queue;
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};
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/* KFD Memory Eviction */
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struct amdgpu_amdkfd_fence {
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struct dma_fence base;
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struct mm_struct *mm;
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spinlock_t lock;
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char timeline_name[TASK_COMM_LEN];
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};
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struct amdgpu_kfd_dev {
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struct kfd_dev *dev;
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uint64_t vram_used;
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};
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struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
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struct mm_struct *mm);
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bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
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struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
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struct amdkfd_process_info {
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/* List head of all VMs that belong to a KFD process */
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struct list_head vm_list_head;
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/* List head for all KFD BOs that belong to a KFD process. */
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struct list_head kfd_bo_list;
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/* List of userptr BOs that are valid or invalid */
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struct list_head userptr_valid_list;
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struct list_head userptr_inval_list;
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/* Lock to protect kfd_bo_list */
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struct mutex lock;
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/* Number of VMs */
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unsigned int n_vms;
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/* Eviction Fence */
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struct amdgpu_amdkfd_fence *eviction_fence;
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/* MMU-notifier related fields */
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atomic_t evicted_bos;
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struct delayed_work restore_userptr_work;
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struct pid *pid;
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};
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int amdgpu_amdkfd_init(void);
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void amdgpu_amdkfd_fini(void);
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void amdgpu_amdkfd_suspend(struct amdgpu_device *adev);
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int amdgpu_amdkfd_resume(struct amdgpu_device *adev);
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void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
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const void *ih_ring_entry);
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void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
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void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
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void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev);
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int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm);
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int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,
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uint32_t vmid, uint64_t gpu_addr,
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uint32_t *ib_cmd, uint32_t ib_len);
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void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle);
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struct kfd2kgd_calls *amdgpu_amdkfd_gfx_7_get_functions(void);
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struct kfd2kgd_calls *amdgpu_amdkfd_gfx_8_0_get_functions(void);
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struct kfd2kgd_calls *amdgpu_amdkfd_gfx_9_0_get_functions(void);
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bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
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int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev);
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int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
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void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);
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/* Shared API */
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int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
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void **mem_obj, uint64_t *gpu_addr,
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void **cpu_ptr, bool mqd_gfx9);
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void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
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void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
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struct kfd_local_mem_info *mem_info);
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uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);
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uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
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void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info);
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int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd,
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struct kgd_dev **dmabuf_kgd,
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uint64_t *bo_size, void *metadata_buffer,
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size_t buffer_size, uint32_t *metadata_size,
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uint32_t *flags);
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uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd);
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uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd);
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#define read_user_wptr(mmptr, wptr, dst) \
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({ \
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bool valid = false; \
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if ((mmptr) && (wptr)) { \
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if ((mmptr) == current->mm) { \
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valid = !get_user((dst), (wptr)); \
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} else if (current->mm == NULL) { \
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use_mm(mmptr); \
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valid = !get_user((dst), (wptr)); \
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unuse_mm(mmptr); \
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} \
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} \
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valid; \
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})
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/* GPUVM API */
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int amdgpu_amdkfd_gpuvm_create_process_vm(struct kgd_dev *kgd, unsigned int pasid,
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void **vm, void **process_info,
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struct dma_fence **ef);
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int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct kgd_dev *kgd,
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struct file *filp, unsigned int pasid,
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void **vm, void **process_info,
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struct dma_fence **ef);
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void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
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struct amdgpu_vm *vm);
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void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm);
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void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm);
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uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm);
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int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
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struct kgd_dev *kgd, uint64_t va, uint64_t size,
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void *vm, struct kgd_mem **mem,
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uint64_t *offset, uint32_t flags);
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int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
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struct kgd_dev *kgd, struct kgd_mem *mem);
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int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
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struct kgd_dev *kgd, struct kgd_mem *mem, void *vm);
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int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
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struct kgd_dev *kgd, struct kgd_mem *mem, void *vm);
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int amdgpu_amdkfd_gpuvm_sync_memory(
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struct kgd_dev *kgd, struct kgd_mem *mem, bool intr);
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int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_dev *kgd,
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struct kgd_mem *mem, void **kptr, uint64_t *size);
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int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,
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struct dma_fence **ef);
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int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct kgd_dev *kgd,
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struct kfd_vm_fault_info *info);
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int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd,
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struct dma_buf *dmabuf,
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uint64_t va, void *vm,
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struct kgd_mem **mem, uint64_t *size,
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uint64_t *mmap_offset);
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void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
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void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo);
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/* KGD2KFD callbacks */
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int kgd2kfd_init(void);
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void kgd2kfd_exit(void);
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struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev,
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const struct kfd2kgd_calls *f2g);
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bool kgd2kfd_device_init(struct kfd_dev *kfd,
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const struct kgd2kfd_shared_resources *gpu_resources);
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void kgd2kfd_device_exit(struct kfd_dev *kfd);
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void kgd2kfd_suspend(struct kfd_dev *kfd);
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int kgd2kfd_resume(struct kfd_dev *kfd);
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int kgd2kfd_pre_reset(struct kfd_dev *kfd);
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int kgd2kfd_post_reset(struct kfd_dev *kfd);
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void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
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int kgd2kfd_quiesce_mm(struct mm_struct *mm);
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int kgd2kfd_resume_mm(struct mm_struct *mm);
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int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
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struct dma_fence *fence);
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#endif /* AMDGPU_AMDKFD_H_INCLUDED */
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