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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 01:16:45 +07:00
190dbcfd68
During SFN4111T initialisation, check whether the PHY boot status indicates a bad firmware checksum. If so, prepare to reflash rather than continuing with normal initialisation. Remove redundant PHY boot status check from tenxpress_phy_init(). Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
439 lines
12 KiB
C
439 lines
12 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2007-2008 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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/*****************************************************************************
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* Support for the SFE4001 and SFN4111T NICs.
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*
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* The SFE4001 does not power-up fully at reset due to its high power
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* consumption. We control its power via a PCA9539 I/O expander.
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* Both boards have a MAX6647 temperature monitor which we expose to
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* the lm90 driver.
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*
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* This also provides minimal support for reflashing the PHY, which is
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* initiated by resetting it with the FLASH_CFG_1 pin pulled down.
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* On SFE4001 rev A2 and later this is connected to the 3V3X output of
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* the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
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* We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
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* exclusive with the network device being open.
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*/
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#include <linux/delay.h>
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#include <linux/rtnetlink.h>
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#include "net_driver.h"
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#include "efx.h"
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#include "phy.h"
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#include "boards.h"
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#include "falcon.h"
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#include "falcon_hwdefs.h"
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#include "falcon_io.h"
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#include "mac.h"
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#include "workarounds.h"
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/**************************************************************************
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*
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* I2C IO Expander device
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*
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**************************************************************************/
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#define PCA9539 0x74
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#define P0_IN 0x00
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#define P0_OUT 0x02
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#define P0_INVERT 0x04
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#define P0_CONFIG 0x06
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#define P0_EN_1V0X_LBN 0
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#define P0_EN_1V0X_WIDTH 1
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#define P0_EN_1V2_LBN 1
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#define P0_EN_1V2_WIDTH 1
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#define P0_EN_2V5_LBN 2
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#define P0_EN_2V5_WIDTH 1
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#define P0_EN_3V3X_LBN 3
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#define P0_EN_3V3X_WIDTH 1
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#define P0_EN_5V_LBN 4
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#define P0_EN_5V_WIDTH 1
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#define P0_SHORTEN_JTAG_LBN 5
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#define P0_SHORTEN_JTAG_WIDTH 1
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#define P0_X_TRST_LBN 6
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#define P0_X_TRST_WIDTH 1
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#define P0_DSP_RESET_LBN 7
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#define P0_DSP_RESET_WIDTH 1
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#define P1_IN 0x01
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#define P1_OUT 0x03
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#define P1_INVERT 0x05
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#define P1_CONFIG 0x07
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#define P1_AFE_PWD_LBN 0
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#define P1_AFE_PWD_WIDTH 1
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#define P1_DSP_PWD25_LBN 1
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#define P1_DSP_PWD25_WIDTH 1
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#define P1_RESERVED_LBN 2
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#define P1_RESERVED_WIDTH 2
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#define P1_SPARE_LBN 4
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#define P1_SPARE_WIDTH 4
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/* Temperature Sensor */
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#define MAX664X_REG_RSL 0x02
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#define MAX664X_REG_WLHO 0x0B
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static void sfe4001_poweroff(struct efx_nic *efx)
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{
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struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
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struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
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/* Turn off all power rails and disable outputs */
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i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
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i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
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i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
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/* Clear any over-temperature alert */
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i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
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}
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static int sfe4001_poweron(struct efx_nic *efx)
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{
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struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
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struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
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unsigned int i, j;
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int rc;
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u8 out;
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/* Clear any previous over-temperature alert */
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rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
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if (rc < 0)
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return rc;
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/* Enable port 0 and port 1 outputs on IO expander */
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
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if (rc)
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return rc;
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rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
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0xff & ~(1 << P1_SPARE_LBN));
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if (rc)
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goto fail_on;
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/* If PHY power is on, turn it all off and wait 1 second to
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* ensure a full reset.
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*/
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rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
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if (rc < 0)
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goto fail_on;
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out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
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(0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
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(0 << P0_EN_1V0X_LBN));
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if (rc != out) {
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EFX_INFO(efx, "power-cycling PHY\n");
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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schedule_timeout_uninterruptible(HZ);
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}
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for (i = 0; i < 20; ++i) {
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/* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
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out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
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(1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
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(1 << P0_X_TRST_LBN));
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if (efx->phy_mode & PHY_MODE_SPECIAL)
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out |= 1 << P0_EN_3V3X_LBN;
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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msleep(10);
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/* Turn on 1V power rail */
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out &= ~(1 << P0_EN_1V0X_LBN);
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
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/* In flash config mode, DSP does not turn on AFE, so
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* just wait 1 second.
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*/
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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schedule_timeout_uninterruptible(HZ);
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return 0;
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}
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for (j = 0; j < 10; ++j) {
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msleep(100);
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/* Check DSP has asserted AFE power line */
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rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
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if (rc < 0)
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goto fail_on;
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if (rc & (1 << P1_AFE_PWD_LBN))
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return 0;
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}
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}
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EFX_INFO(efx, "timed out waiting for DSP boot\n");
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rc = -ETIMEDOUT;
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fail_on:
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sfe4001_poweroff(efx);
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return rc;
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}
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static int sfn4111t_reset(struct efx_nic *efx)
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{
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efx_oword_t reg;
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/* GPIO 3 and the GPIO register are shared with I2C, so block that */
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mutex_lock(&efx->i2c_adap.bus_lock);
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/* Pull RST_N (GPIO 2) low then let it up again, setting the
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* FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
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* output enables; the output levels should always be 0 (low)
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* and we rely on external pull-ups. */
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falcon_read(efx, ®, GPIO_CTL_REG_KER);
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EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true);
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falcon_write(efx, ®, GPIO_CTL_REG_KER);
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msleep(1000);
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EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, false);
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EFX_SET_OWORD_FIELD(reg, GPIO3_OEN,
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!!(efx->phy_mode & PHY_MODE_SPECIAL));
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falcon_write(efx, ®, GPIO_CTL_REG_KER);
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msleep(1);
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mutex_unlock(&efx->i2c_adap.bus_lock);
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ssleep(1);
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return 0;
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}
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static ssize_t show_phy_flash_cfg(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
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return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
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}
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static ssize_t set_phy_flash_cfg(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
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enum efx_phy_mode old_mode, new_mode;
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int err;
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rtnl_lock();
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old_mode = efx->phy_mode;
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if (count == 0 || *buf == '0')
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new_mode = old_mode & ~PHY_MODE_SPECIAL;
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else
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new_mode = PHY_MODE_SPECIAL;
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if (old_mode == new_mode) {
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err = 0;
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} else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
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err = -EBUSY;
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} else {
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/* Reset the PHY, reconfigure the MAC and enable/disable
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* MAC stats accordingly. */
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efx->phy_mode = new_mode;
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if (new_mode & PHY_MODE_SPECIAL)
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efx_stats_disable(efx);
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if (efx->board_info.type == EFX_BOARD_SFE4001)
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err = sfe4001_poweron(efx);
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else
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err = sfn4111t_reset(efx);
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efx_reconfigure_port(efx);
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if (!(new_mode & PHY_MODE_SPECIAL))
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efx_stats_enable(efx);
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}
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rtnl_unlock();
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return err ? err : count;
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}
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static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
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static void sfe4001_fini(struct efx_nic *efx)
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{
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EFX_INFO(efx, "%s\n", __func__);
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device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
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sfe4001_poweroff(efx);
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i2c_unregister_device(efx->board_info.ioexp_client);
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i2c_unregister_device(efx->board_info.hwmon_client);
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}
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static int sfe4001_check_hw(struct efx_nic *efx)
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{
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s32 status;
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/* If XAUI link is up then do not monitor */
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if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
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return 0;
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/* Check the powered status of the PHY. Lack of power implies that
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* the MAX6647 has shut down power to it, probably due to a temp.
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* alarm. Reading the power status rather than the MAX6647 status
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* directly because the later is read-to-clear and would thus
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* start to power up the PHY again when polled, causing us to blip
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* the power undesirably.
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* We know we can read from the IO expander because we did
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* it during power-on. Assume failure now is bad news. */
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status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
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if (status >= 0 &&
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(status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
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return 0;
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/* Use board power control, not PHY power control */
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sfe4001_poweroff(efx);
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efx->phy_mode = PHY_MODE_OFF;
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return (status < 0) ? -EIO : -ERANGE;
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}
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static struct i2c_board_info sfe4001_hwmon_info = {
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I2C_BOARD_INFO("max6647", 0x4e),
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.irq = -1,
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};
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/* This board uses an I2C expander to provider power to the PHY, which needs to
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* be turned on before the PHY can be used.
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* Context: Process context, rtnl lock held
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*/
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int sfe4001_init(struct efx_nic *efx)
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{
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int rc;
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#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
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efx->board_info.hwmon_client =
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i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
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#else
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efx->board_info.hwmon_client =
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i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
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#endif
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if (!efx->board_info.hwmon_client)
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return -EIO;
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/* Raise board/PHY high limit from 85 to 90 degrees Celsius */
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rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
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MAX664X_REG_WLHO, 90);
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if (rc)
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goto fail_hwmon;
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efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
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if (!efx->board_info.ioexp_client) {
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rc = -EIO;
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goto fail_hwmon;
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}
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/* 10Xpress has fixed-function LED pins, so there is no board-specific
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* blink code. */
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efx->board_info.blink = tenxpress_phy_blink;
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efx->board_info.monitor = sfe4001_check_hw;
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efx->board_info.fini = sfe4001_fini;
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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/* PHY won't generate a 156.25 MHz clock and MAC stats fetch
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* will fail. */
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efx_stats_disable(efx);
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}
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rc = sfe4001_poweron(efx);
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if (rc)
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goto fail_ioexp;
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rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
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if (rc)
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goto fail_on;
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EFX_INFO(efx, "PHY is powered on\n");
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return 0;
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fail_on:
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sfe4001_poweroff(efx);
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fail_ioexp:
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i2c_unregister_device(efx->board_info.ioexp_client);
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fail_hwmon:
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i2c_unregister_device(efx->board_info.hwmon_client);
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return rc;
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}
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static int sfn4111t_check_hw(struct efx_nic *efx)
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{
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s32 status;
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/* If XAUI link is up then do not monitor */
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if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
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return 0;
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/* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
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status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
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MAX664X_REG_RSL);
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if (status < 0)
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return -EIO;
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if (status & 0x57)
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return -ERANGE;
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return 0;
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}
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static void sfn4111t_fini(struct efx_nic *efx)
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{
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EFX_INFO(efx, "%s\n", __func__);
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device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
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i2c_unregister_device(efx->board_info.hwmon_client);
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}
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static struct i2c_board_info sfn4111t_a0_hwmon_info = {
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I2C_BOARD_INFO("max6647", 0x4e),
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.irq = -1,
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};
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static struct i2c_board_info sfn4111t_r5_hwmon_info = {
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I2C_BOARD_INFO("max6646", 0x4d),
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.irq = -1,
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};
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int sfn4111t_init(struct efx_nic *efx)
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{
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int i = 0;
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int rc;
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efx->board_info.hwmon_client =
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i2c_new_device(&efx->i2c_adap,
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(efx->board_info.minor < 5) ?
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&sfn4111t_a0_hwmon_info :
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&sfn4111t_r5_hwmon_info);
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if (!efx->board_info.hwmon_client)
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return -EIO;
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efx->board_info.blink = tenxpress_phy_blink;
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efx->board_info.monitor = sfn4111t_check_hw;
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efx->board_info.fini = sfn4111t_fini;
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rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
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if (rc)
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goto fail_hwmon;
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do {
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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/* PHY may not generate a 156.25 MHz clock and MAC
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* stats fetch will fail. */
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efx_stats_disable(efx);
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sfn4111t_reset(efx);
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}
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rc = sft9001_wait_boot(efx);
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if (rc == 0)
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return 0;
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efx->phy_mode = PHY_MODE_SPECIAL;
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} while (rc == -EINVAL && ++i < 2);
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device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
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fail_hwmon:
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i2c_unregister_device(efx->board_info.hwmon_client);
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return rc;
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}
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