Lendacky, Thomas 853eb16b8b amd-xgbe: Base queue fifo size and enablement on ring count ... When setting the fifo sizes for the queues and enabling the queues use the number of active Tx and Rx queues that have been enabled not the maximum number available. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2014-07-30 18:46:52 -07:00
..
xgbe	amd-xgbe: Base queue fifo size and enablement on ring count	2014-07-30 18:46:52 -07:00
7990.c
7990.h
a2065.c
a2065.h
am79c961a.c
am79c961a.h
amd8111e.c	ethernet: amd: fix 'foo* bar'	2014-07-14 19:14:15 -07:00
amd8111e.h
ariadne.c
ariadne.h
atarilance.c
au1000_eth.c
au1000_eth.h
declance.c	declance: Fix 64-bit compilation warnings	2014-07-08 14:04:30 -07:00
hplance.c
hplance.h
Kconfig	amd-xgbe: Add hardware timestamp support	2014-07-30 18:46:52 -07:00
lance.c
Makefile	amd-xgbe: Configuration and build support	2014-06-05 15:26:51 -07:00
mvme147.c
ni65.c
ni65.h
nmclan_cs.c
pcnet32.c
sun3lance.c
sunlance.c