Mika Kuoppala 84eac0c659 drm/i915/gt: Force pte cacheline to main memory ... We have problems of tgl not seeing a valid pte entry when iommu is enabled. Add heavy handed flushing of entry modification by flushing the cpu, cacheline and then wcb. This forces the pte out to main memory past this point regarless of promises of coherency. This is an evolution of an experimental patch from Chris Wilson of adding wmb for coherent partners, by adding a clflush to force the cache->memory step. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1840 Testcase: igt/gem_exec_fence/parallel Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200511160803.15407-1-mika.kuoppala@linux.intel.com		2020-05-11 17:25:07 +01:00
..
selftests
uc	drm/i915: Remove wait priority boosting	2020-05-07 20:08:58 +01:00
debugfs_engines.c	drm/i915/gt: allow setting generic data pointer	2020-03-26 21:20:51 +00:00
debugfs_engines.h
debugfs_gt_pm.c	drm/i915/gt: Move rps.enabled/active to flags	2020-04-30 00:57:35 +01:00
debugfs_gt_pm.h
debugfs_gt.c	drm/i915/uc: Move uC debugfs to its own folder under GT	2020-03-26 21:23:03 +00:00
debugfs_gt.h	drm/i915/gt: allow setting generic data pointer	2020-03-26 21:20:51 +00:00
gen6_ppgtt.c
gen6_ppgtt.h
gen6_renderstate.c
gen7_renderclear.c	drm/i915/gen7: Clear all EU/L3 residual contexts	2020-03-06 08:59:06 +00:00
gen7_renderclear.h	drm/i915/gen7: Clear all EU/L3 residual contexts	2020-03-06 08:59:06 +00:00
gen7_renderstate.c
gen8_ppgtt.c	drm/i915/gt: Force pte cacheline to main memory	2020-05-11 17:25:07 +01:00
gen8_ppgtt.h
gen8_renderstate.c
gen9_renderstate.c
hsw_clear_kernel.c	drm/i915/gen7: Clear all EU/L3 residual contexts	2020-03-06 08:59:06 +00:00
intel_breadcrumbs.c	drm/i915/gt: Mark up racy check of breadcrumb irq enabled	2020-04-08 13:40:07 +01:00
intel_context_param.c	drm/i915: Allow userspace to specify ringsize on construction	2020-02-25 19:23:19 +00:00
intel_context_param.h	drm/i915: Allow userspace to specify ringsize on construction	2020-02-25 19:23:19 +00:00
intel_context_sseu.c	drm/i915: Make define for lrc state offset	2020-04-24 00:52:14 +01:00
intel_context_types.h	drm/i915/execlists: Avoid reusing the same logical CCID	2020-04-28 22:17:36 +01:00
intel_context.c	Merge drm/drm-next into drm-intel-next-queued	2020-04-16 14:35:16 +03:00
intel_context.h	drm/i915: Use explicit flag to mark unreachable intel_context	2020-03-26 10:21:04 -07:00
intel_engine_cs.c	drm/i915/gt: Move the batch buffer pool from the engine to the gt	2020-04-30 19:12:02 +01:00
intel_engine_heartbeat.c	drm/i915/gt: Always reschedule the new heartbeat	2020-03-17 18:26:15 +00:00
intel_engine_heartbeat.h
intel_engine_pm.c	drm/i915/gt: Stop holding onto the pinned_default_state	2020-05-05 21:12:33 +01:00
intel_engine_pm.h	drm/i915: Extend intel_wakeref to support delayed puts	2020-03-23 12:51:05 +00:00
intel_engine_types.h	drm/i915/gt: Stop holding onto the pinned_default_state	2020-05-05 21:12:33 +01:00
intel_engine_user.c
intel_engine_user.h
intel_engine.h	drm/i915/gen12: Fix HDC pipeline flush	2020-05-07 07:44:41 +01:00
intel_ggtt_fencing.c	drm/i915/gt: Make fence revocation unequivocal	2020-04-01 23:34:17 +01:00
intel_ggtt_fencing.h	drm/i915/gt: Store the fence details on the fence	2020-04-01 23:34:16 +01:00
intel_ggtt.c	drm/i915: Refactor setting dma info to a common helper	2020-04-18 07:49:11 +01:00
intel_gpu_commands.h	drm/i915/gen12: Fix HDC pipeline flush	2020-05-07 07:44:41 +01:00
intel_gt_buffer_pool_types.h	drm/i915/gt: Move the batch buffer pool from the engine to the gt	2020-04-30 19:12:02 +01:00
intel_gt_buffer_pool.c	drm/i915/gt: Move the batch buffer pool from the engine to the gt	2020-04-30 19:12:02 +01:00
intel_gt_buffer_pool.h	drm/i915/gt: Move the batch buffer pool from the engine to the gt	2020-04-30 19:12:02 +01:00
intel_gt_clock_utils.c	drm/i915/gt: Fix up clock frequency	2020-04-27 17:34:33 +01:00
intel_gt_clock_utils.h	drm/i915/gt: Use the RPM config register to determine clk frequencies	2020-04-24 19:10:17 +01:00
intel_gt_irq.c	drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore	2020-04-07 14:43:58 +01:00
intel_gt_irq.h
intel_gt_pm_irq.c
intel_gt_pm_irq.h
intel_gt_pm.c	drm/i915/gt: Sanitize RPS interrupts upon resume	2020-05-03 08:24:36 +01:00
intel_gt_pm.h
intel_gt_requests.c	drm/i915/gt: Check carefully for an idle engine in wait-for-idle	2020-04-23 16:16:32 +01:00
intel_gt_requests.h
intel_gt_types.h	drm/i915/gt: Move the batch buffer pool from the engine to the gt	2020-04-30 19:12:02 +01:00
intel_gt.c	drm/i915/gt: Move the batch buffer pool from the engine to the gt	2020-04-30 19:12:02 +01:00
intel_gt.h
intel_gtt.c	drm/i915/gt: Pull marking vm as closed underneath the vm->mutex	2020-02-28 12:33:07 +00:00
intel_gtt.h	drm/i915/gt: Allocate i915_fence_reg array	2020-03-16 20:28:29 +00:00
intel_llc_types.h
intel_llc.c	drm/i915/gt: Do not attempt to reprogram IA/ring frequencies for dgfx	2020-02-19 22:27:10 +00:00
intel_llc.h
intel_lrc_reg.h	drm/i915/selftests: Add context batchbuffers registers to live_lrc_fixed	2020-04-24 00:36:13 +01:00
intel_lrc.c	drm/i915/gt: Mark up the racy read of execlists->context_tag	2020-05-11 11:01:12 +01:00
intel_lrc.h	drm/i915: Make define for lrc state offset	2020-04-24 00:52:14 +01:00
intel_mocs.c	drm/i915/gt: Refactor l3cc/mocs availability	2020-02-19 14:09:18 +00:00
intel_mocs.h
intel_ppgtt.c
intel_rc6_types.h
intel_rc6.c	drm/i915: Remove cnl pre-prod workarounds	2020-05-04 18:44:52 +03:00
intel_rc6.h
intel_renderstate.c	drm/i915: Emit await(batch) before MI_BB_START	2020-05-11 16:50:04 +01:00
intel_renderstate.h
intel_reset_types.h
intel_reset.c	drm/i915/gt: prefer struct drm_device based logging	2020-04-08 13:49:35 +03:00
intel_reset.h
intel_ring_submission.c	drm/i915/gt: Keep a no-frills swappable copy of the default context state	2020-04-29 19:02:37 +01:00
intel_ring_types.h	drm/i915/gt: Avoid resetting ring->head outside of its timeline mutex	2020-02-11 12:03:22 +00:00
intel_ring.c	drm/i915/execlists: Always force a context reload when rewinding RING_TAIL	2020-02-07 21:41:46 +00:00
intel_ring.h	drm/i915/gt: Mark up racy read of intel_ring.head	2020-04-08 13:40:07 +01:00
intel_rps_types.h	drm/i915/gt: Switch to manual evaluation of RPS	2020-04-30 00:57:37 +01:00
intel_rps.c	drm/i915/gt: Sanitize RPS interrupts upon resume	2020-05-03 08:24:36 +01:00
intel_rps.h	drm/i915/gt: Sanitize RPS interrupts upon resume	2020-05-03 08:24:36 +01:00
intel_sseu.c	drm/i915/perf: introduce global sseu pinning	2020-03-17 15:27:55 +02:00
intel_sseu.h
intel_timeline_types.h
intel_timeline.c	drm/i915: Make intel_timeline_init static	2020-05-11 12:52:08 +01:00
intel_timeline.h	drm/i915: Make intel_timeline_init static	2020-05-11 12:52:08 +01:00
intel_workarounds_types.h	drm/i915/gt: Skip rmw for masked registers	2020-02-01 09:21:57 +00:00
intel_workarounds.c	drm/i915: Remove cnl pre-prod workarounds	2020-05-04 18:44:52 +03:00
intel_workarounds.h
ivb_clear_kernel.c	drm/i915/gen7: Clear all EU/L3 residual contexts	2020-03-06 08:59:06 +00:00
mock_engine.c	drm/i915/gt: Move the batch buffer pool from the engine to the gt	2020-04-30 19:12:02 +01:00
mock_engine.h
selftest_context.c	drm/i915/gt: Stop holding onto the pinned_default_state	2020-05-05 21:12:33 +01:00
selftest_engine_cs.c
selftest_engine_heartbeat.c	drm/i915/selftests: Disable heartbeat around manual pulse tests	2020-02-28 09:25:41 +00:00
selftest_engine_pm.c
selftest_engine.c
selftest_engine.h
selftest_gt_pm.c	drm/i915/gt: Fix up clock frequency	2020-04-27 17:34:33 +01:00
selftest_hangcheck.c	drm/i915: Apply i915_request_skip() on submission	2020-03-04 14:29:50 +00:00
selftest_llc.c	drm/i915/gt: Do not attempt to reprogram IA/ring frequencies for dgfx	2020-02-19 22:27:10 +00:00
selftest_llc.h
selftest_lrc.c	drm/i915/gt: Stop holding onto the pinned_default_state	2020-05-05 21:12:33 +01:00
selftest_mocs.c	drm/i915/gt: Refactor l3cc/mocs availability	2020-02-19 14:09:18 +00:00
selftest_rc6.c	drm/i915/selftests: Move gpu energy measurement into its own little lib	2020-04-17 18:48:51 +01:00
selftest_rc6.h
selftest_reset.c	drm/i915/guc: Kill USES_GUC_SUBMISSION macro	2020-02-20 17:48:03 +00:00
selftest_ring_submission.c	drm/i915/selftests: Always flush before unpining after writing	2020-05-11 16:50:04 +01:00
selftest_rps.c	drm/i915/selftests: Always flush before unpining after writing	2020-05-11 16:50:04 +01:00
selftest_rps.h	drm/i915/gt: Fix up clock frequency	2020-04-27 17:34:33 +01:00
selftest_timeline.c	drm/i915/selftests: Remove erroneous intel_engine_pm_put	2020-02-09 13:47:26 +00:00
selftest_workarounds.c	drm/i915/selftests: Also wait for the scratch buffer to be bound	2020-01-31 15:10:02 +00:00
shmem_utils.c	drm/i915/gt: Keep a no-frills swappable copy of the default context state	2020-04-29 19:02:37 +01:00
shmem_utils.h	drm/i915/gt: Keep a no-frills swappable copy of the default context state	2020-04-29 19:02:37 +01:00
st_shmem_utils.c	drm/i915/gt: Keep a no-frills swappable copy of the default context state	2020-04-29 19:02:37 +01:00
sysfs_engines.c	drm/i915/gt: Expose heartbeat interval via sysfs	2020-02-28 22:03:49 +00:00
sysfs_engines.h	drm/i915/gt: Expose engine properties via sysfs	2020-02-28 22:03:19 +00:00