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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 08:16:45 +07:00
2a4bfd023f
The timeriomem_rng driver only accesses the first 4 bytes of the given memory area and currently, it also forces that memory resource to be exactly 4 bytes in size. This, however, is problematic when used with device-trees that are generated from things like FPGA toolchains, where the minimum size of an exposed memory block may be something like 4k. Hence, let's only check for what's needed for the driver to operate properly; namely that we have enough memory available to read the random data from. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
214 lines
5.4 KiB
C
214 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* drivers/char/hw_random/timeriomem-rng.c
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*
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* Copyright (C) 2009 Alexander Clouter <alex@digriz.org.uk>
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*
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* Derived from drivers/char/hw_random/omap-rng.c
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* Copyright 2005 (c) MontaVista Software, Inc.
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* Author: Deepak Saxena <dsaxena@plexity.net>
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*
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* Overview:
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* This driver is useful for platforms that have an IO range that provides
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* periodic random data from a single IO memory address. All the platform
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* has to do is provide the address and 'wait time' that new data becomes
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* available.
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*
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* TODO: add support for reading sizes other than 32bits and masking
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*/
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/hrtimer.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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#include <linux/ktime.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/time.h>
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#include <linux/timeriomem-rng.h>
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struct timeriomem_rng_private {
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void __iomem *io_base;
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ktime_t period;
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unsigned int present:1;
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struct hrtimer timer;
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struct completion completion;
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struct hwrng rng_ops;
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};
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static int timeriomem_rng_read(struct hwrng *hwrng, void *data,
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size_t max, bool wait)
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{
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struct timeriomem_rng_private *priv =
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container_of(hwrng, struct timeriomem_rng_private, rng_ops);
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int retval = 0;
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int period_us = ktime_to_us(priv->period);
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/*
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* There may not have been enough time for new data to be generated
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* since the last request. If the caller doesn't want to wait, let them
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* bail out. Otherwise, wait for the completion. If the new data has
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* already been generated, the completion should already be available.
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*/
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if (!wait && !priv->present)
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return 0;
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wait_for_completion(&priv->completion);
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do {
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/*
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* After the first read, all additional reads will need to wait
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* for the RNG to generate new data. Since the period can have
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* a wide range of values (1us to 1s have been observed), allow
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* for 1% tolerance in the sleep time rather than a fixed value.
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*/
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if (retval > 0)
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usleep_range(period_us,
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period_us + min(1, period_us / 100));
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*(u32 *)data = readl(priv->io_base);
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retval += sizeof(u32);
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data += sizeof(u32);
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max -= sizeof(u32);
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} while (wait && max > sizeof(u32));
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/*
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* Block any new callers until the RNG has had time to generate new
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* data.
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*/
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priv->present = 0;
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reinit_completion(&priv->completion);
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hrtimer_forward_now(&priv->timer, priv->period);
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hrtimer_restart(&priv->timer);
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return retval;
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}
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static enum hrtimer_restart timeriomem_rng_trigger(struct hrtimer *timer)
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{
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struct timeriomem_rng_private *priv
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= container_of(timer, struct timeriomem_rng_private, timer);
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priv->present = 1;
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complete(&priv->completion);
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return HRTIMER_NORESTART;
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}
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static int timeriomem_rng_probe(struct platform_device *pdev)
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{
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struct timeriomem_rng_data *pdata = pdev->dev.platform_data;
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struct timeriomem_rng_private *priv;
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struct resource *res;
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int err = 0;
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int period;
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if (!pdev->dev.of_node && !pdata) {
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dev_err(&pdev->dev, "timeriomem_rng_data is missing\n");
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return -EINVAL;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENXIO;
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if (res->start % 4 != 0 || resource_size(res) < 4) {
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dev_err(&pdev->dev,
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"address must be at least four bytes wide and 32-bit aligned\n");
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return -EINVAL;
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}
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/* Allocate memory for the device structure (and zero it) */
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priv = devm_kzalloc(&pdev->dev,
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sizeof(struct timeriomem_rng_private), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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platform_set_drvdata(pdev, priv);
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if (pdev->dev.of_node) {
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int i;
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if (!of_property_read_u32(pdev->dev.of_node,
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"period", &i))
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period = i;
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else {
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dev_err(&pdev->dev, "missing period\n");
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return -EINVAL;
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}
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if (!of_property_read_u32(pdev->dev.of_node,
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"quality", &i))
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priv->rng_ops.quality = i;
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else
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priv->rng_ops.quality = 0;
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} else {
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period = pdata->period;
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priv->rng_ops.quality = pdata->quality;
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}
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priv->period = ns_to_ktime(period * NSEC_PER_USEC);
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init_completion(&priv->completion);
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hrtimer_init(&priv->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
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priv->timer.function = timeriomem_rng_trigger;
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priv->rng_ops.name = dev_name(&pdev->dev);
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priv->rng_ops.read = timeriomem_rng_read;
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priv->io_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->io_base)) {
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return PTR_ERR(priv->io_base);
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}
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/* Assume random data is already available. */
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priv->present = 1;
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complete(&priv->completion);
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err = hwrng_register(&priv->rng_ops);
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if (err) {
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dev_err(&pdev->dev, "problem registering\n");
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return err;
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}
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dev_info(&pdev->dev, "32bits from 0x%p @ %dus\n",
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priv->io_base, period);
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return 0;
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}
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static int timeriomem_rng_remove(struct platform_device *pdev)
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{
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struct timeriomem_rng_private *priv = platform_get_drvdata(pdev);
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hwrng_unregister(&priv->rng_ops);
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hrtimer_cancel(&priv->timer);
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return 0;
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}
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static const struct of_device_id timeriomem_rng_match[] = {
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{ .compatible = "timeriomem_rng" },
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{},
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};
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MODULE_DEVICE_TABLE(of, timeriomem_rng_match);
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static struct platform_driver timeriomem_rng_driver = {
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.driver = {
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.name = "timeriomem_rng",
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.of_match_table = timeriomem_rng_match,
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},
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.probe = timeriomem_rng_probe,
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.remove = timeriomem_rng_remove,
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};
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module_platform_driver(timeriomem_rng_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Alexander Clouter <alex@digriz.org.uk>");
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MODULE_DESCRIPTION("Timer IOMEM H/W RNG driver");
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