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5fc3aeeb9e
The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
82 lines
2.8 KiB
C
82 lines
2.8 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __AMD_SHARED_H__
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#define __AMD_SHARED_H__
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enum amd_ip_block_type {
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AMD_IP_BLOCK_TYPE_COMMON,
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AMD_IP_BLOCK_TYPE_GMC,
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AMD_IP_BLOCK_TYPE_IH,
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AMD_IP_BLOCK_TYPE_SMC,
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AMD_IP_BLOCK_TYPE_DCE,
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AMD_IP_BLOCK_TYPE_GFX,
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AMD_IP_BLOCK_TYPE_SDMA,
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AMD_IP_BLOCK_TYPE_UVD,
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AMD_IP_BLOCK_TYPE_VCE,
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};
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enum amd_clockgating_state {
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AMD_CG_STATE_GATE = 0,
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AMD_CG_STATE_UNGATE,
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};
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enum amd_powergating_state {
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AMD_PG_STATE_GATE = 0,
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AMD_PG_STATE_UNGATE,
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};
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struct amd_ip_funcs {
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/* sets up early driver state (pre sw_init), does not configure hw - Optional */
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int (*early_init)(void *handle);
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/* sets up late driver/hw state (post hw_init) - Optional */
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int (*late_init)(void *handle);
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/* sets up driver state, does not configure hw */
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int (*sw_init)(void *handle);
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/* tears down driver state, does not configure hw */
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int (*sw_fini)(void *handle);
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/* sets up the hw state */
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int (*hw_init)(void *handle);
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/* tears down the hw state */
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int (*hw_fini)(void *handle);
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/* handles IP specific hw/sw changes for suspend */
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int (*suspend)(void *handle);
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/* handles IP specific hw/sw changes for resume */
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int (*resume)(void *handle);
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/* returns current IP block idle status */
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bool (*is_idle)(void *handle);
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/* poll for idle */
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int (*wait_for_idle)(void *handle);
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/* soft reset the IP block */
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int (*soft_reset)(void *handle);
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/* dump the IP block status registers */
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void (*print_status)(void *handle);
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/* enable/disable cg for the IP block */
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int (*set_clockgating_state)(void *handle,
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enum amd_clockgating_state state);
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/* enable/disable pg for the IP block */
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int (*set_powergating_state)(void *handle,
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enum amd_powergating_state state);
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};
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#endif /* __AMD_SHARED_H__ */
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