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c65e774fb3
For boot-time switching between 4- and 5-level paging we need to be able to fold p4d page table level at runtime. It requires variable PGDIR_SHIFT and PTRS_PER_P4D. The change doesn't affect the kernel image size much: text data bss dec hex filename 8628091 4734304 1368064 14730459 e0c4db vmlinux.before 8628393 4734340 1368064 14730797 e0c62d vmlinux.after Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20180214111656.88514-7-kirill.shutemov@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
200 lines
5.5 KiB
C
200 lines
5.5 KiB
C
/*
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* This file contains some kasan initialization code.
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*
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* Copyright (c) 2015 Samsung Electronics Co., Ltd.
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* Author: Andrey Ryabinin <ryabinin.a.a@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/bootmem.h>
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#include <linux/init.h>
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#include <linux/kasan.h>
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#include <linux/kernel.h>
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#include <linux/memblock.h>
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#include <linux/mm.h>
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#include <linux/pfn.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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/*
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* This page serves two purposes:
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* - It used as early shadow memory. The entire shadow region populated
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* with this page, before we will be able to setup normal shadow memory.
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* - Latter it reused it as zero shadow to cover large ranges of memory
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* that allowed to access, but not handled by kasan (vmalloc/vmemmap ...).
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*/
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unsigned char kasan_zero_page[PAGE_SIZE] __page_aligned_bss;
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#if CONFIG_PGTABLE_LEVELS > 4
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p4d_t kasan_zero_p4d[MAX_PTRS_PER_P4D] __page_aligned_bss;
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#endif
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#if CONFIG_PGTABLE_LEVELS > 3
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pud_t kasan_zero_pud[PTRS_PER_PUD] __page_aligned_bss;
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#endif
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#if CONFIG_PGTABLE_LEVELS > 2
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pmd_t kasan_zero_pmd[PTRS_PER_PMD] __page_aligned_bss;
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#endif
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pte_t kasan_zero_pte[PTRS_PER_PTE] __page_aligned_bss;
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static __init void *early_alloc(size_t size, int node)
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{
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return memblock_virt_alloc_try_nid(size, size, __pa(MAX_DMA_ADDRESS),
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BOOTMEM_ALLOC_ACCESSIBLE, node);
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}
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static void __init zero_pte_populate(pmd_t *pmd, unsigned long addr,
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unsigned long end)
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{
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pte_t *pte = pte_offset_kernel(pmd, addr);
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pte_t zero_pte;
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zero_pte = pfn_pte(PFN_DOWN(__pa_symbol(kasan_zero_page)), PAGE_KERNEL);
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zero_pte = pte_wrprotect(zero_pte);
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while (addr + PAGE_SIZE <= end) {
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set_pte_at(&init_mm, addr, pte, zero_pte);
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addr += PAGE_SIZE;
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pte = pte_offset_kernel(pmd, addr);
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}
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}
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static void __init zero_pmd_populate(pud_t *pud, unsigned long addr,
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unsigned long end)
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{
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pmd_t *pmd = pmd_offset(pud, addr);
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unsigned long next;
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do {
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next = pmd_addr_end(addr, end);
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if (IS_ALIGNED(addr, PMD_SIZE) && end - addr >= PMD_SIZE) {
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pmd_populate_kernel(&init_mm, pmd, lm_alias(kasan_zero_pte));
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continue;
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}
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if (pmd_none(*pmd)) {
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pmd_populate_kernel(&init_mm, pmd,
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early_alloc(PAGE_SIZE, NUMA_NO_NODE));
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}
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zero_pte_populate(pmd, addr, next);
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} while (pmd++, addr = next, addr != end);
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}
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static void __init zero_pud_populate(p4d_t *p4d, unsigned long addr,
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unsigned long end)
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{
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pud_t *pud = pud_offset(p4d, addr);
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unsigned long next;
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do {
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next = pud_addr_end(addr, end);
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if (IS_ALIGNED(addr, PUD_SIZE) && end - addr >= PUD_SIZE) {
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pmd_t *pmd;
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pud_populate(&init_mm, pud, lm_alias(kasan_zero_pmd));
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pmd = pmd_offset(pud, addr);
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pmd_populate_kernel(&init_mm, pmd, lm_alias(kasan_zero_pte));
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continue;
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}
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if (pud_none(*pud)) {
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pud_populate(&init_mm, pud,
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early_alloc(PAGE_SIZE, NUMA_NO_NODE));
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}
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zero_pmd_populate(pud, addr, next);
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} while (pud++, addr = next, addr != end);
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}
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static void __init zero_p4d_populate(pgd_t *pgd, unsigned long addr,
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unsigned long end)
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{
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p4d_t *p4d = p4d_offset(pgd, addr);
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unsigned long next;
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do {
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next = p4d_addr_end(addr, end);
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if (IS_ALIGNED(addr, P4D_SIZE) && end - addr >= P4D_SIZE) {
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pud_t *pud;
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pmd_t *pmd;
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p4d_populate(&init_mm, p4d, lm_alias(kasan_zero_pud));
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pud = pud_offset(p4d, addr);
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pud_populate(&init_mm, pud, lm_alias(kasan_zero_pmd));
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pmd = pmd_offset(pud, addr);
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pmd_populate_kernel(&init_mm, pmd,
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lm_alias(kasan_zero_pte));
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continue;
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}
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if (p4d_none(*p4d)) {
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p4d_populate(&init_mm, p4d,
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early_alloc(PAGE_SIZE, NUMA_NO_NODE));
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}
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zero_pud_populate(p4d, addr, next);
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} while (p4d++, addr = next, addr != end);
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}
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/**
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* kasan_populate_zero_shadow - populate shadow memory region with
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* kasan_zero_page
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* @shadow_start - start of the memory range to populate
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* @shadow_end - end of the memory range to populate
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*/
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void __init kasan_populate_zero_shadow(const void *shadow_start,
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const void *shadow_end)
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{
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unsigned long addr = (unsigned long)shadow_start;
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unsigned long end = (unsigned long)shadow_end;
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pgd_t *pgd = pgd_offset_k(addr);
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unsigned long next;
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do {
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next = pgd_addr_end(addr, end);
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if (IS_ALIGNED(addr, PGDIR_SIZE) && end - addr >= PGDIR_SIZE) {
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p4d_t *p4d;
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pud_t *pud;
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pmd_t *pmd;
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/*
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* kasan_zero_pud should be populated with pmds
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* at this moment.
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* [pud,pmd]_populate*() below needed only for
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* 3,2 - level page tables where we don't have
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* puds,pmds, so pgd_populate(), pud_populate()
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* is noops.
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*
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* The ifndef is required to avoid build breakage.
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*
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* With 5level-fixup.h, pgd_populate() is not nop and
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* we reference kasan_zero_p4d. It's not defined
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* unless 5-level paging enabled.
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*
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* The ifndef can be dropped once all KASAN-enabled
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* architectures will switch to pgtable-nop4d.h.
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*/
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#ifndef __ARCH_HAS_5LEVEL_HACK
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pgd_populate(&init_mm, pgd, lm_alias(kasan_zero_p4d));
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#endif
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p4d = p4d_offset(pgd, addr);
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p4d_populate(&init_mm, p4d, lm_alias(kasan_zero_pud));
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pud = pud_offset(p4d, addr);
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pud_populate(&init_mm, pud, lm_alias(kasan_zero_pmd));
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pmd = pmd_offset(pud, addr);
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pmd_populate_kernel(&init_mm, pmd, lm_alias(kasan_zero_pte));
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continue;
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}
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if (pgd_none(*pgd)) {
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pgd_populate(&init_mm, pgd,
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early_alloc(PAGE_SIZE, NUMA_NO_NODE));
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}
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zero_p4d_populate(pgd, addr, next);
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} while (pgd++, addr = next, addr != end);
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}
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