mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 12:26:46 +07:00
d4d84fef6d
On an architecture without CMPXCHG_LOCAL but with DEBUG_VM enabled, the VM_BUG_ON() in __pcpu_double_call_return_bool() will cause an early panic during boot unless we always align cpu_slab properly. In principle we could remove the alignment-testing VM_BUG_ON() for architectures that don't have CMPXCHG_LOCAL, but leaving it in means that new code will tend not to break x86 even if it is introduced on another platform, and it's low cost to require alignment. Acked-by: David Rientjes <rientjes@google.com> Acked-by: Christoph Lameter <cl@linux.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Pekka Enberg <penberg@kernel.org>
958 lines
32 KiB
C
958 lines
32 KiB
C
#ifndef __LINUX_PERCPU_H
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#define __LINUX_PERCPU_H
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#include <linux/preempt.h>
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#include <linux/smp.h>
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#include <linux/cpumask.h>
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#include <linux/pfn.h>
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#include <linux/init.h>
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#include <asm/percpu.h>
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/* enough to cover all DEFINE_PER_CPUs in modules */
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#ifdef CONFIG_MODULES
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#define PERCPU_MODULE_RESERVE (8 << 10)
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#else
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#define PERCPU_MODULE_RESERVE 0
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#endif
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#ifndef PERCPU_ENOUGH_ROOM
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#define PERCPU_ENOUGH_ROOM \
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(ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
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PERCPU_MODULE_RESERVE)
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#endif
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/*
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* Must be an lvalue. Since @var must be a simple identifier,
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* we force a syntax error here if it isn't.
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*/
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#define get_cpu_var(var) (*({ \
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preempt_disable(); \
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&__get_cpu_var(var); }))
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/*
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* The weird & is necessary because sparse considers (void)(var) to be
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* a direct dereference of percpu variable (var).
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*/
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#define put_cpu_var(var) do { \
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(void)&(var); \
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preempt_enable(); \
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} while (0)
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#define get_cpu_ptr(var) ({ \
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preempt_disable(); \
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this_cpu_ptr(var); })
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#define put_cpu_ptr(var) do { \
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(void)(var); \
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preempt_enable(); \
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} while (0)
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/* minimum unit size, also is the maximum supported allocation size */
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#define PCPU_MIN_UNIT_SIZE PFN_ALIGN(32 << 10)
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/*
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* Percpu allocator can serve percpu allocations before slab is
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* initialized which allows slab to depend on the percpu allocator.
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* The following two parameters decide how much resource to
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* preallocate for this. Keep PERCPU_DYNAMIC_RESERVE equal to or
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* larger than PERCPU_DYNAMIC_EARLY_SIZE.
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*/
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#define PERCPU_DYNAMIC_EARLY_SLOTS 128
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#define PERCPU_DYNAMIC_EARLY_SIZE (12 << 10)
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/*
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* PERCPU_DYNAMIC_RESERVE indicates the amount of free area to piggy
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* back on the first chunk for dynamic percpu allocation if arch is
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* manually allocating and mapping it for faster access (as a part of
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* large page mapping for example).
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*
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* The following values give between one and two pages of free space
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* after typical minimal boot (2-way SMP, single disk and NIC) with
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* both defconfig and a distro config on x86_64 and 32. More
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* intelligent way to determine this would be nice.
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*/
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#if BITS_PER_LONG > 32
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#define PERCPU_DYNAMIC_RESERVE (20 << 10)
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#else
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#define PERCPU_DYNAMIC_RESERVE (12 << 10)
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#endif
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extern void *pcpu_base_addr;
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extern const unsigned long *pcpu_unit_offsets;
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struct pcpu_group_info {
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int nr_units; /* aligned # of units */
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unsigned long base_offset; /* base address offset */
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unsigned int *cpu_map; /* unit->cpu map, empty
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* entries contain NR_CPUS */
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};
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struct pcpu_alloc_info {
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size_t static_size;
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size_t reserved_size;
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size_t dyn_size;
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size_t unit_size;
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size_t atom_size;
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size_t alloc_size;
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size_t __ai_size; /* internal, don't use */
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int nr_groups; /* 0 if grouping unnecessary */
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struct pcpu_group_info groups[];
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};
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enum pcpu_fc {
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PCPU_FC_AUTO,
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PCPU_FC_EMBED,
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PCPU_FC_PAGE,
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PCPU_FC_NR,
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};
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extern const char *pcpu_fc_names[PCPU_FC_NR];
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extern enum pcpu_fc pcpu_chosen_fc;
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typedef void * (*pcpu_fc_alloc_fn_t)(unsigned int cpu, size_t size,
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size_t align);
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typedef void (*pcpu_fc_free_fn_t)(void *ptr, size_t size);
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typedef void (*pcpu_fc_populate_pte_fn_t)(unsigned long addr);
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typedef int (pcpu_fc_cpu_distance_fn_t)(unsigned int from, unsigned int to);
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extern struct pcpu_alloc_info * __init pcpu_alloc_alloc_info(int nr_groups,
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int nr_units);
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extern void __init pcpu_free_alloc_info(struct pcpu_alloc_info *ai);
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extern int __init pcpu_setup_first_chunk(const struct pcpu_alloc_info *ai,
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void *base_addr);
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#ifdef CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK
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extern int __init pcpu_embed_first_chunk(size_t reserved_size, size_t dyn_size,
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size_t atom_size,
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pcpu_fc_cpu_distance_fn_t cpu_distance_fn,
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pcpu_fc_alloc_fn_t alloc_fn,
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pcpu_fc_free_fn_t free_fn);
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#endif
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#ifdef CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK
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extern int __init pcpu_page_first_chunk(size_t reserved_size,
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pcpu_fc_alloc_fn_t alloc_fn,
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pcpu_fc_free_fn_t free_fn,
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pcpu_fc_populate_pte_fn_t populate_pte_fn);
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#endif
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/*
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* Use this to get to a cpu's version of the per-cpu object
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* dynamically allocated. Non-atomic access to the current CPU's
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* version should probably be combined with get_cpu()/put_cpu().
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*/
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#ifdef CONFIG_SMP
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#define per_cpu_ptr(ptr, cpu) SHIFT_PERCPU_PTR((ptr), per_cpu_offset((cpu)))
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#else
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#define per_cpu_ptr(ptr, cpu) ({ (void)(cpu); VERIFY_PERCPU_PTR((ptr)); })
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#endif
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extern void __percpu *__alloc_reserved_percpu(size_t size, size_t align);
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extern bool is_kernel_percpu_address(unsigned long addr);
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#if !defined(CONFIG_SMP) || !defined(CONFIG_HAVE_SETUP_PER_CPU_AREA)
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extern void __init setup_per_cpu_areas(void);
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#endif
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extern void __init percpu_init_late(void);
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extern void __percpu *__alloc_percpu(size_t size, size_t align);
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extern void free_percpu(void __percpu *__pdata);
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extern phys_addr_t per_cpu_ptr_to_phys(void *addr);
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#define alloc_percpu(type) \
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(typeof(type) __percpu *)__alloc_percpu(sizeof(type), __alignof__(type))
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/*
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* Optional methods for optimized non-lvalue per-cpu variable access.
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*
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* @var can be a percpu variable or a field of it and its size should
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* equal char, int or long. percpu_read() evaluates to a lvalue and
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* all others to void.
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*
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* These operations are guaranteed to be atomic w.r.t. preemption.
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* The generic versions use plain get/put_cpu_var(). Archs are
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* encouraged to implement single-instruction alternatives which don't
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* require preemption protection.
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*/
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#ifndef percpu_read
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# define percpu_read(var) \
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({ \
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typeof(var) *pr_ptr__ = &(var); \
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typeof(var) pr_ret__; \
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pr_ret__ = get_cpu_var(*pr_ptr__); \
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put_cpu_var(*pr_ptr__); \
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pr_ret__; \
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})
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#endif
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#define __percpu_generic_to_op(var, val, op) \
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do { \
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typeof(var) *pgto_ptr__ = &(var); \
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get_cpu_var(*pgto_ptr__) op val; \
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put_cpu_var(*pgto_ptr__); \
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} while (0)
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#ifndef percpu_write
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# define percpu_write(var, val) __percpu_generic_to_op(var, (val), =)
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#endif
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#ifndef percpu_add
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# define percpu_add(var, val) __percpu_generic_to_op(var, (val), +=)
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#endif
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#ifndef percpu_sub
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# define percpu_sub(var, val) __percpu_generic_to_op(var, (val), -=)
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#endif
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#ifndef percpu_and
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# define percpu_and(var, val) __percpu_generic_to_op(var, (val), &=)
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#endif
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#ifndef percpu_or
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# define percpu_or(var, val) __percpu_generic_to_op(var, (val), |=)
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#endif
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#ifndef percpu_xor
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# define percpu_xor(var, val) __percpu_generic_to_op(var, (val), ^=)
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#endif
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/*
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* Branching function to split up a function into a set of functions that
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* are called for different scalar sizes of the objects handled.
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*/
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extern void __bad_size_call_parameter(void);
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#define __pcpu_size_call_return(stem, variable) \
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({ typeof(variable) pscr_ret__; \
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__verify_pcpu_ptr(&(variable)); \
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switch(sizeof(variable)) { \
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case 1: pscr_ret__ = stem##1(variable);break; \
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case 2: pscr_ret__ = stem##2(variable);break; \
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case 4: pscr_ret__ = stem##4(variable);break; \
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case 8: pscr_ret__ = stem##8(variable);break; \
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default: \
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__bad_size_call_parameter();break; \
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} \
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pscr_ret__; \
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})
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#define __pcpu_size_call_return2(stem, variable, ...) \
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({ \
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typeof(variable) pscr2_ret__; \
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__verify_pcpu_ptr(&(variable)); \
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switch(sizeof(variable)) { \
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case 1: pscr2_ret__ = stem##1(variable, __VA_ARGS__); break; \
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case 2: pscr2_ret__ = stem##2(variable, __VA_ARGS__); break; \
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case 4: pscr2_ret__ = stem##4(variable, __VA_ARGS__); break; \
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case 8: pscr2_ret__ = stem##8(variable, __VA_ARGS__); break; \
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default: \
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__bad_size_call_parameter(); break; \
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} \
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pscr2_ret__; \
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})
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/*
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* Special handling for cmpxchg_double. cmpxchg_double is passed two
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* percpu variables. The first has to be aligned to a double word
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* boundary and the second has to follow directly thereafter.
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* We enforce this on all architectures even if they don't support
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* a double cmpxchg instruction, since it's a cheap requirement, and it
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* avoids breaking the requirement for architectures with the instruction.
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*/
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#define __pcpu_double_call_return_bool(stem, pcp1, pcp2, ...) \
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({ \
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bool pdcrb_ret__; \
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__verify_pcpu_ptr(&pcp1); \
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BUILD_BUG_ON(sizeof(pcp1) != sizeof(pcp2)); \
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VM_BUG_ON((unsigned long)(&pcp1) % (2 * sizeof(pcp1))); \
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VM_BUG_ON((unsigned long)(&pcp2) != \
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(unsigned long)(&pcp1) + sizeof(pcp1)); \
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switch(sizeof(pcp1)) { \
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case 1: pdcrb_ret__ = stem##1(pcp1, pcp2, __VA_ARGS__); break; \
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case 2: pdcrb_ret__ = stem##2(pcp1, pcp2, __VA_ARGS__); break; \
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case 4: pdcrb_ret__ = stem##4(pcp1, pcp2, __VA_ARGS__); break; \
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case 8: pdcrb_ret__ = stem##8(pcp1, pcp2, __VA_ARGS__); break; \
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default: \
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__bad_size_call_parameter(); break; \
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} \
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pdcrb_ret__; \
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})
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#define __pcpu_size_call(stem, variable, ...) \
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do { \
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__verify_pcpu_ptr(&(variable)); \
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switch(sizeof(variable)) { \
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case 1: stem##1(variable, __VA_ARGS__);break; \
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case 2: stem##2(variable, __VA_ARGS__);break; \
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case 4: stem##4(variable, __VA_ARGS__);break; \
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case 8: stem##8(variable, __VA_ARGS__);break; \
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default: \
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__bad_size_call_parameter();break; \
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} \
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} while (0)
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/*
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* Optimized manipulation for memory allocated through the per cpu
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* allocator or for addresses of per cpu variables.
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*
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* These operation guarantee exclusivity of access for other operations
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* on the *same* processor. The assumption is that per cpu data is only
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* accessed by a single processor instance (the current one).
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*
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* The first group is used for accesses that must be done in a
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* preemption safe way since we know that the context is not preempt
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* safe. Interrupts may occur. If the interrupt modifies the variable
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* too then RMW actions will not be reliable.
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*
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* The arch code can provide optimized functions in two ways:
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*
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* 1. Override the function completely. F.e. define this_cpu_add().
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* The arch must then ensure that the various scalar format passed
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* are handled correctly.
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*
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* 2. Provide functions for certain scalar sizes. F.e. provide
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* this_cpu_add_2() to provide per cpu atomic operations for 2 byte
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* sized RMW actions. If arch code does not provide operations for
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* a scalar size then the fallback in the generic code will be
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* used.
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*/
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#define _this_cpu_generic_read(pcp) \
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({ typeof(pcp) ret__; \
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preempt_disable(); \
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ret__ = *this_cpu_ptr(&(pcp)); \
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preempt_enable(); \
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ret__; \
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})
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#ifndef this_cpu_read
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# ifndef this_cpu_read_1
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# define this_cpu_read_1(pcp) _this_cpu_generic_read(pcp)
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# endif
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# ifndef this_cpu_read_2
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# define this_cpu_read_2(pcp) _this_cpu_generic_read(pcp)
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# endif
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# ifndef this_cpu_read_4
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# define this_cpu_read_4(pcp) _this_cpu_generic_read(pcp)
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# endif
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# ifndef this_cpu_read_8
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# define this_cpu_read_8(pcp) _this_cpu_generic_read(pcp)
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# endif
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# define this_cpu_read(pcp) __pcpu_size_call_return(this_cpu_read_, (pcp))
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#endif
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#define _this_cpu_generic_to_op(pcp, val, op) \
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do { \
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preempt_disable(); \
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*__this_cpu_ptr(&(pcp)) op val; \
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preempt_enable(); \
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} while (0)
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#ifndef this_cpu_write
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# ifndef this_cpu_write_1
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# define this_cpu_write_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), =)
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# endif
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# ifndef this_cpu_write_2
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# define this_cpu_write_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), =)
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# endif
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# ifndef this_cpu_write_4
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# define this_cpu_write_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), =)
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# endif
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# ifndef this_cpu_write_8
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# define this_cpu_write_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), =)
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# endif
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# define this_cpu_write(pcp, val) __pcpu_size_call(this_cpu_write_, (pcp), (val))
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#endif
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#ifndef this_cpu_add
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# ifndef this_cpu_add_1
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# define this_cpu_add_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=)
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# endif
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# ifndef this_cpu_add_2
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# define this_cpu_add_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=)
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# endif
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# ifndef this_cpu_add_4
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# define this_cpu_add_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=)
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# endif
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# ifndef this_cpu_add_8
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# define this_cpu_add_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=)
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# endif
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# define this_cpu_add(pcp, val) __pcpu_size_call(this_cpu_add_, (pcp), (val))
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#endif
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#ifndef this_cpu_sub
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# define this_cpu_sub(pcp, val) this_cpu_add((pcp), -(val))
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#endif
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#ifndef this_cpu_inc
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# define this_cpu_inc(pcp) this_cpu_add((pcp), 1)
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#endif
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#ifndef this_cpu_dec
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# define this_cpu_dec(pcp) this_cpu_sub((pcp), 1)
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#endif
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#ifndef this_cpu_and
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# ifndef this_cpu_and_1
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# define this_cpu_and_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=)
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# endif
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# ifndef this_cpu_and_2
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# define this_cpu_and_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=)
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# endif
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# ifndef this_cpu_and_4
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# define this_cpu_and_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=)
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# endif
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# ifndef this_cpu_and_8
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# define this_cpu_and_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=)
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# endif
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# define this_cpu_and(pcp, val) __pcpu_size_call(this_cpu_and_, (pcp), (val))
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#endif
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#ifndef this_cpu_or
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# ifndef this_cpu_or_1
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# define this_cpu_or_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=)
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# endif
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# ifndef this_cpu_or_2
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# define this_cpu_or_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=)
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# endif
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# ifndef this_cpu_or_4
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# define this_cpu_or_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=)
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# endif
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# ifndef this_cpu_or_8
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# define this_cpu_or_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=)
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# endif
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# define this_cpu_or(pcp, val) __pcpu_size_call(this_cpu_or_, (pcp), (val))
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#endif
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#ifndef this_cpu_xor
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# ifndef this_cpu_xor_1
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# define this_cpu_xor_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=)
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# endif
|
|
# ifndef this_cpu_xor_2
|
|
# define this_cpu_xor_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=)
|
|
# endif
|
|
# ifndef this_cpu_xor_4
|
|
# define this_cpu_xor_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=)
|
|
# endif
|
|
# ifndef this_cpu_xor_8
|
|
# define this_cpu_xor_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=)
|
|
# endif
|
|
# define this_cpu_xor(pcp, val) __pcpu_size_call(this_cpu_or_, (pcp), (val))
|
|
#endif
|
|
|
|
#define _this_cpu_generic_add_return(pcp, val) \
|
|
({ \
|
|
typeof(pcp) ret__; \
|
|
preempt_disable(); \
|
|
__this_cpu_add(pcp, val); \
|
|
ret__ = __this_cpu_read(pcp); \
|
|
preempt_enable(); \
|
|
ret__; \
|
|
})
|
|
|
|
#ifndef this_cpu_add_return
|
|
# ifndef this_cpu_add_return_1
|
|
# define this_cpu_add_return_1(pcp, val) _this_cpu_generic_add_return(pcp, val)
|
|
# endif
|
|
# ifndef this_cpu_add_return_2
|
|
# define this_cpu_add_return_2(pcp, val) _this_cpu_generic_add_return(pcp, val)
|
|
# endif
|
|
# ifndef this_cpu_add_return_4
|
|
# define this_cpu_add_return_4(pcp, val) _this_cpu_generic_add_return(pcp, val)
|
|
# endif
|
|
# ifndef this_cpu_add_return_8
|
|
# define this_cpu_add_return_8(pcp, val) _this_cpu_generic_add_return(pcp, val)
|
|
# endif
|
|
# define this_cpu_add_return(pcp, val) __pcpu_size_call_return2(this_cpu_add_return_, pcp, val)
|
|
#endif
|
|
|
|
#define this_cpu_sub_return(pcp, val) this_cpu_add_return(pcp, -(val))
|
|
#define this_cpu_inc_return(pcp) this_cpu_add_return(pcp, 1)
|
|
#define this_cpu_dec_return(pcp) this_cpu_add_return(pcp, -1)
|
|
|
|
#define _this_cpu_generic_xchg(pcp, nval) \
|
|
({ typeof(pcp) ret__; \
|
|
preempt_disable(); \
|
|
ret__ = __this_cpu_read(pcp); \
|
|
__this_cpu_write(pcp, nval); \
|
|
preempt_enable(); \
|
|
ret__; \
|
|
})
|
|
|
|
#ifndef this_cpu_xchg
|
|
# ifndef this_cpu_xchg_1
|
|
# define this_cpu_xchg_1(pcp, nval) _this_cpu_generic_xchg(pcp, nval)
|
|
# endif
|
|
# ifndef this_cpu_xchg_2
|
|
# define this_cpu_xchg_2(pcp, nval) _this_cpu_generic_xchg(pcp, nval)
|
|
# endif
|
|
# ifndef this_cpu_xchg_4
|
|
# define this_cpu_xchg_4(pcp, nval) _this_cpu_generic_xchg(pcp, nval)
|
|
# endif
|
|
# ifndef this_cpu_xchg_8
|
|
# define this_cpu_xchg_8(pcp, nval) _this_cpu_generic_xchg(pcp, nval)
|
|
# endif
|
|
# define this_cpu_xchg(pcp, nval) \
|
|
__pcpu_size_call_return2(this_cpu_xchg_, (pcp), nval)
|
|
#endif
|
|
|
|
#define _this_cpu_generic_cmpxchg(pcp, oval, nval) \
|
|
({ typeof(pcp) ret__; \
|
|
preempt_disable(); \
|
|
ret__ = __this_cpu_read(pcp); \
|
|
if (ret__ == (oval)) \
|
|
__this_cpu_write(pcp, nval); \
|
|
preempt_enable(); \
|
|
ret__; \
|
|
})
|
|
|
|
#ifndef this_cpu_cmpxchg
|
|
# ifndef this_cpu_cmpxchg_1
|
|
# define this_cpu_cmpxchg_1(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval)
|
|
# endif
|
|
# ifndef this_cpu_cmpxchg_2
|
|
# define this_cpu_cmpxchg_2(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval)
|
|
# endif
|
|
# ifndef this_cpu_cmpxchg_4
|
|
# define this_cpu_cmpxchg_4(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval)
|
|
# endif
|
|
# ifndef this_cpu_cmpxchg_8
|
|
# define this_cpu_cmpxchg_8(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval)
|
|
# endif
|
|
# define this_cpu_cmpxchg(pcp, oval, nval) \
|
|
__pcpu_size_call_return2(this_cpu_cmpxchg_, pcp, oval, nval)
|
|
#endif
|
|
|
|
/*
|
|
* cmpxchg_double replaces two adjacent scalars at once. The first
|
|
* two parameters are per cpu variables which have to be of the same
|
|
* size. A truth value is returned to indicate success or failure
|
|
* (since a double register result is difficult to handle). There is
|
|
* very limited hardware support for these operations, so only certain
|
|
* sizes may work.
|
|
*/
|
|
#define _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
({ \
|
|
int ret__; \
|
|
preempt_disable(); \
|
|
ret__ = __this_cpu_generic_cmpxchg_double(pcp1, pcp2, \
|
|
oval1, oval2, nval1, nval2); \
|
|
preempt_enable(); \
|
|
ret__; \
|
|
})
|
|
|
|
#ifndef this_cpu_cmpxchg_double
|
|
# ifndef this_cpu_cmpxchg_double_1
|
|
# define this_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
_this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
|
|
# endif
|
|
# ifndef this_cpu_cmpxchg_double_2
|
|
# define this_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
_this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
|
|
# endif
|
|
# ifndef this_cpu_cmpxchg_double_4
|
|
# define this_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
_this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
|
|
# endif
|
|
# ifndef this_cpu_cmpxchg_double_8
|
|
# define this_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
_this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
|
|
# endif
|
|
# define this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
__pcpu_double_call_return_bool(this_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2))
|
|
#endif
|
|
|
|
/*
|
|
* Generic percpu operations that do not require preemption handling.
|
|
* Either we do not care about races or the caller has the
|
|
* responsibility of handling preemptions issues. Arch code can still
|
|
* override these instructions since the arch per cpu code may be more
|
|
* efficient and may actually get race freeness for free (that is the
|
|
* case for x86 for example).
|
|
*
|
|
* If there is no other protection through preempt disable and/or
|
|
* disabling interupts then one of these RMW operations can show unexpected
|
|
* behavior because the execution thread was rescheduled on another processor
|
|
* or an interrupt occurred and the same percpu variable was modified from
|
|
* the interrupt context.
|
|
*/
|
|
#ifndef __this_cpu_read
|
|
# ifndef __this_cpu_read_1
|
|
# define __this_cpu_read_1(pcp) (*__this_cpu_ptr(&(pcp)))
|
|
# endif
|
|
# ifndef __this_cpu_read_2
|
|
# define __this_cpu_read_2(pcp) (*__this_cpu_ptr(&(pcp)))
|
|
# endif
|
|
# ifndef __this_cpu_read_4
|
|
# define __this_cpu_read_4(pcp) (*__this_cpu_ptr(&(pcp)))
|
|
# endif
|
|
# ifndef __this_cpu_read_8
|
|
# define __this_cpu_read_8(pcp) (*__this_cpu_ptr(&(pcp)))
|
|
# endif
|
|
# define __this_cpu_read(pcp) __pcpu_size_call_return(__this_cpu_read_, (pcp))
|
|
#endif
|
|
|
|
#define __this_cpu_generic_to_op(pcp, val, op) \
|
|
do { \
|
|
*__this_cpu_ptr(&(pcp)) op val; \
|
|
} while (0)
|
|
|
|
#ifndef __this_cpu_write
|
|
# ifndef __this_cpu_write_1
|
|
# define __this_cpu_write_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), =)
|
|
# endif
|
|
# ifndef __this_cpu_write_2
|
|
# define __this_cpu_write_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), =)
|
|
# endif
|
|
# ifndef __this_cpu_write_4
|
|
# define __this_cpu_write_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), =)
|
|
# endif
|
|
# ifndef __this_cpu_write_8
|
|
# define __this_cpu_write_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), =)
|
|
# endif
|
|
# define __this_cpu_write(pcp, val) __pcpu_size_call(__this_cpu_write_, (pcp), (val))
|
|
#endif
|
|
|
|
#ifndef __this_cpu_add
|
|
# ifndef __this_cpu_add_1
|
|
# define __this_cpu_add_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=)
|
|
# endif
|
|
# ifndef __this_cpu_add_2
|
|
# define __this_cpu_add_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=)
|
|
# endif
|
|
# ifndef __this_cpu_add_4
|
|
# define __this_cpu_add_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=)
|
|
# endif
|
|
# ifndef __this_cpu_add_8
|
|
# define __this_cpu_add_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=)
|
|
# endif
|
|
# define __this_cpu_add(pcp, val) __pcpu_size_call(__this_cpu_add_, (pcp), (val))
|
|
#endif
|
|
|
|
#ifndef __this_cpu_sub
|
|
# define __this_cpu_sub(pcp, val) __this_cpu_add((pcp), -(val))
|
|
#endif
|
|
|
|
#ifndef __this_cpu_inc
|
|
# define __this_cpu_inc(pcp) __this_cpu_add((pcp), 1)
|
|
#endif
|
|
|
|
#ifndef __this_cpu_dec
|
|
# define __this_cpu_dec(pcp) __this_cpu_sub((pcp), 1)
|
|
#endif
|
|
|
|
#ifndef __this_cpu_and
|
|
# ifndef __this_cpu_and_1
|
|
# define __this_cpu_and_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=)
|
|
# endif
|
|
# ifndef __this_cpu_and_2
|
|
# define __this_cpu_and_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=)
|
|
# endif
|
|
# ifndef __this_cpu_and_4
|
|
# define __this_cpu_and_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=)
|
|
# endif
|
|
# ifndef __this_cpu_and_8
|
|
# define __this_cpu_and_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=)
|
|
# endif
|
|
# define __this_cpu_and(pcp, val) __pcpu_size_call(__this_cpu_and_, (pcp), (val))
|
|
#endif
|
|
|
|
#ifndef __this_cpu_or
|
|
# ifndef __this_cpu_or_1
|
|
# define __this_cpu_or_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=)
|
|
# endif
|
|
# ifndef __this_cpu_or_2
|
|
# define __this_cpu_or_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=)
|
|
# endif
|
|
# ifndef __this_cpu_or_4
|
|
# define __this_cpu_or_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=)
|
|
# endif
|
|
# ifndef __this_cpu_or_8
|
|
# define __this_cpu_or_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=)
|
|
# endif
|
|
# define __this_cpu_or(pcp, val) __pcpu_size_call(__this_cpu_or_, (pcp), (val))
|
|
#endif
|
|
|
|
#ifndef __this_cpu_xor
|
|
# ifndef __this_cpu_xor_1
|
|
# define __this_cpu_xor_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=)
|
|
# endif
|
|
# ifndef __this_cpu_xor_2
|
|
# define __this_cpu_xor_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=)
|
|
# endif
|
|
# ifndef __this_cpu_xor_4
|
|
# define __this_cpu_xor_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=)
|
|
# endif
|
|
# ifndef __this_cpu_xor_8
|
|
# define __this_cpu_xor_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=)
|
|
# endif
|
|
# define __this_cpu_xor(pcp, val) __pcpu_size_call(__this_cpu_xor_, (pcp), (val))
|
|
#endif
|
|
|
|
#define __this_cpu_generic_add_return(pcp, val) \
|
|
({ \
|
|
__this_cpu_add(pcp, val); \
|
|
__this_cpu_read(pcp); \
|
|
})
|
|
|
|
#ifndef __this_cpu_add_return
|
|
# ifndef __this_cpu_add_return_1
|
|
# define __this_cpu_add_return_1(pcp, val) __this_cpu_generic_add_return(pcp, val)
|
|
# endif
|
|
# ifndef __this_cpu_add_return_2
|
|
# define __this_cpu_add_return_2(pcp, val) __this_cpu_generic_add_return(pcp, val)
|
|
# endif
|
|
# ifndef __this_cpu_add_return_4
|
|
# define __this_cpu_add_return_4(pcp, val) __this_cpu_generic_add_return(pcp, val)
|
|
# endif
|
|
# ifndef __this_cpu_add_return_8
|
|
# define __this_cpu_add_return_8(pcp, val) __this_cpu_generic_add_return(pcp, val)
|
|
# endif
|
|
# define __this_cpu_add_return(pcp, val) __pcpu_size_call_return2(this_cpu_add_return_, pcp, val)
|
|
#endif
|
|
|
|
#define __this_cpu_sub_return(pcp, val) this_cpu_add_return(pcp, -(val))
|
|
#define __this_cpu_inc_return(pcp) this_cpu_add_return(pcp, 1)
|
|
#define __this_cpu_dec_return(pcp) this_cpu_add_return(pcp, -1)
|
|
|
|
#define __this_cpu_generic_xchg(pcp, nval) \
|
|
({ typeof(pcp) ret__; \
|
|
ret__ = __this_cpu_read(pcp); \
|
|
__this_cpu_write(pcp, nval); \
|
|
ret__; \
|
|
})
|
|
|
|
#ifndef __this_cpu_xchg
|
|
# ifndef __this_cpu_xchg_1
|
|
# define __this_cpu_xchg_1(pcp, nval) __this_cpu_generic_xchg(pcp, nval)
|
|
# endif
|
|
# ifndef __this_cpu_xchg_2
|
|
# define __this_cpu_xchg_2(pcp, nval) __this_cpu_generic_xchg(pcp, nval)
|
|
# endif
|
|
# ifndef __this_cpu_xchg_4
|
|
# define __this_cpu_xchg_4(pcp, nval) __this_cpu_generic_xchg(pcp, nval)
|
|
# endif
|
|
# ifndef __this_cpu_xchg_8
|
|
# define __this_cpu_xchg_8(pcp, nval) __this_cpu_generic_xchg(pcp, nval)
|
|
# endif
|
|
# define __this_cpu_xchg(pcp, nval) \
|
|
__pcpu_size_call_return2(__this_cpu_xchg_, (pcp), nval)
|
|
#endif
|
|
|
|
#define __this_cpu_generic_cmpxchg(pcp, oval, nval) \
|
|
({ \
|
|
typeof(pcp) ret__; \
|
|
ret__ = __this_cpu_read(pcp); \
|
|
if (ret__ == (oval)) \
|
|
__this_cpu_write(pcp, nval); \
|
|
ret__; \
|
|
})
|
|
|
|
#ifndef __this_cpu_cmpxchg
|
|
# ifndef __this_cpu_cmpxchg_1
|
|
# define __this_cpu_cmpxchg_1(pcp, oval, nval) __this_cpu_generic_cmpxchg(pcp, oval, nval)
|
|
# endif
|
|
# ifndef __this_cpu_cmpxchg_2
|
|
# define __this_cpu_cmpxchg_2(pcp, oval, nval) __this_cpu_generic_cmpxchg(pcp, oval, nval)
|
|
# endif
|
|
# ifndef __this_cpu_cmpxchg_4
|
|
# define __this_cpu_cmpxchg_4(pcp, oval, nval) __this_cpu_generic_cmpxchg(pcp, oval, nval)
|
|
# endif
|
|
# ifndef __this_cpu_cmpxchg_8
|
|
# define __this_cpu_cmpxchg_8(pcp, oval, nval) __this_cpu_generic_cmpxchg(pcp, oval, nval)
|
|
# endif
|
|
# define __this_cpu_cmpxchg(pcp, oval, nval) \
|
|
__pcpu_size_call_return2(__this_cpu_cmpxchg_, pcp, oval, nval)
|
|
#endif
|
|
|
|
#define __this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
({ \
|
|
int __ret = 0; \
|
|
if (__this_cpu_read(pcp1) == (oval1) && \
|
|
__this_cpu_read(pcp2) == (oval2)) { \
|
|
__this_cpu_write(pcp1, (nval1)); \
|
|
__this_cpu_write(pcp2, (nval2)); \
|
|
__ret = 1; \
|
|
} \
|
|
(__ret); \
|
|
})
|
|
|
|
#ifndef __this_cpu_cmpxchg_double
|
|
# ifndef __this_cpu_cmpxchg_double_1
|
|
# define __this_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
__this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
|
|
# endif
|
|
# ifndef __this_cpu_cmpxchg_double_2
|
|
# define __this_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
__this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
|
|
# endif
|
|
# ifndef __this_cpu_cmpxchg_double_4
|
|
# define __this_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
__this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
|
|
# endif
|
|
# ifndef __this_cpu_cmpxchg_double_8
|
|
# define __this_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
__this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
|
|
# endif
|
|
# define __this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
|
|
__pcpu_double_call_return_bool(__this_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2))
|
|
#endif
|
|
|
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/*
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* IRQ safe versions of the per cpu RMW operations. Note that these operations
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* are *not* safe against modification of the same variable from another
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* processors (which one gets when using regular atomic operations)
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* They are guaranteed to be atomic vs. local interrupts and
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* preemption only.
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*/
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#define irqsafe_cpu_generic_to_op(pcp, val, op) \
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do { \
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unsigned long flags; \
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local_irq_save(flags); \
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*__this_cpu_ptr(&(pcp)) op val; \
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local_irq_restore(flags); \
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} while (0)
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#ifndef irqsafe_cpu_add
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# ifndef irqsafe_cpu_add_1
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# define irqsafe_cpu_add_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
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# endif
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# ifndef irqsafe_cpu_add_2
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# define irqsafe_cpu_add_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
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# endif
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# ifndef irqsafe_cpu_add_4
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# define irqsafe_cpu_add_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
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# endif
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# ifndef irqsafe_cpu_add_8
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# define irqsafe_cpu_add_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
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# endif
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# define irqsafe_cpu_add(pcp, val) __pcpu_size_call(irqsafe_cpu_add_, (pcp), (val))
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#endif
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#ifndef irqsafe_cpu_sub
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# define irqsafe_cpu_sub(pcp, val) irqsafe_cpu_add((pcp), -(val))
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#endif
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#ifndef irqsafe_cpu_inc
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# define irqsafe_cpu_inc(pcp) irqsafe_cpu_add((pcp), 1)
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#endif
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#ifndef irqsafe_cpu_dec
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# define irqsafe_cpu_dec(pcp) irqsafe_cpu_sub((pcp), 1)
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#endif
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#ifndef irqsafe_cpu_and
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# ifndef irqsafe_cpu_and_1
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# define irqsafe_cpu_and_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
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# endif
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# ifndef irqsafe_cpu_and_2
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# define irqsafe_cpu_and_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
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# endif
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# ifndef irqsafe_cpu_and_4
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# define irqsafe_cpu_and_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
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# endif
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# ifndef irqsafe_cpu_and_8
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# define irqsafe_cpu_and_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
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# endif
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# define irqsafe_cpu_and(pcp, val) __pcpu_size_call(irqsafe_cpu_and_, (val))
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#endif
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#ifndef irqsafe_cpu_or
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# ifndef irqsafe_cpu_or_1
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# define irqsafe_cpu_or_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
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# endif
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# ifndef irqsafe_cpu_or_2
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# define irqsafe_cpu_or_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
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# endif
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# ifndef irqsafe_cpu_or_4
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# define irqsafe_cpu_or_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
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# endif
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# ifndef irqsafe_cpu_or_8
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# define irqsafe_cpu_or_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
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# endif
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# define irqsafe_cpu_or(pcp, val) __pcpu_size_call(irqsafe_cpu_or_, (val))
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#endif
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#ifndef irqsafe_cpu_xor
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# ifndef irqsafe_cpu_xor_1
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# define irqsafe_cpu_xor_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
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# endif
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# ifndef irqsafe_cpu_xor_2
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# define irqsafe_cpu_xor_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
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# endif
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# ifndef irqsafe_cpu_xor_4
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# define irqsafe_cpu_xor_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
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# endif
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# ifndef irqsafe_cpu_xor_8
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# define irqsafe_cpu_xor_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
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# endif
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# define irqsafe_cpu_xor(pcp, val) __pcpu_size_call(irqsafe_cpu_xor_, (val))
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#endif
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#define irqsafe_cpu_generic_cmpxchg(pcp, oval, nval) \
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({ \
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typeof(pcp) ret__; \
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unsigned long flags; \
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local_irq_save(flags); \
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ret__ = __this_cpu_read(pcp); \
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if (ret__ == (oval)) \
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__this_cpu_write(pcp, nval); \
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local_irq_restore(flags); \
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ret__; \
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})
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#ifndef irqsafe_cpu_cmpxchg
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# ifndef irqsafe_cpu_cmpxchg_1
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# define irqsafe_cpu_cmpxchg_1(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_2
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# define irqsafe_cpu_cmpxchg_2(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_4
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# define irqsafe_cpu_cmpxchg_4(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_8
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# define irqsafe_cpu_cmpxchg_8(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# define irqsafe_cpu_cmpxchg(pcp, oval, nval) \
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__pcpu_size_call_return2(irqsafe_cpu_cmpxchg_, (pcp), oval, nval)
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#endif
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#define irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
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({ \
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int ret__; \
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unsigned long flags; \
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local_irq_save(flags); \
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ret__ = __this_cpu_generic_cmpxchg_double(pcp1, pcp2, \
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oval1, oval2, nval1, nval2); \
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local_irq_restore(flags); \
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ret__; \
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})
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#ifndef irqsafe_cpu_cmpxchg_double
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# ifndef irqsafe_cpu_cmpxchg_double_1
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# define irqsafe_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2) \
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irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_double_2
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# define irqsafe_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2) \
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irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_double_4
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# define irqsafe_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2) \
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irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_double_8
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# define irqsafe_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2) \
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irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
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# endif
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# define irqsafe_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
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__pcpu_double_call_return_bool(irqsafe_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2))
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#endif
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#endif /* __LINUX_PERCPU_H */
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