mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 03:06:43 +07:00
f7df9be067
These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as well,
and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and
the Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition"
is added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7)
are supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported, which
in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet Processor",
following the IPQ806x that is used in many high-end WiFi routers. This one
integrates two ath10k wifi radios that were previously on separate chips.
Other boards that got added for existing chips are:
- On Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
- On Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
- On NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and
SoloX Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
- On Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
- On Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
- On Rockchips platform:
- mqmaker MiQi single-board computer
- On Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
- On Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC
single board computers
Across many platforms, bug fixes went in to address warnings that
dtc now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router),
Ti Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as
well, and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and the
Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition" is
added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are
supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported,
which in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet
Processor", following the IPQ806x that is used in many high-end WiFi
routers. This one integrates two ath10k wifi radios that were
previously on separate chips.
Other boards that got added for existing chips are:
Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX
Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
Rockchips platform:
- mqmaker MiQi single-board computer
Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board
computers
Across many platforms, bug fixes went in to address warnings that dtc
now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti
Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits)
ARM: dts: tango4: Import watchdog node
ARM: dts: tango4: Update cpus node for cpufreq
ARM: dts: tango4: Update DT to match clk driver
ARM: dts: tango4: Initial thermal support
arm/dst: Add Aspeed ast2500 device tree
arm/dts: Add Aspeed ast2400 device tree
ARM: sun7i: dt: Add pll3 and pll7 clocks
ARM: dts: sunxi: Add a olinuxino-lime2-emmc
ARM: dts: at91: sama5d4: add trng node
ARM: dts: at91: sama5d3: add trng node
ARM: dts: at91: sama5d2: add trng node
ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
ARM: sun4i: dt: Add pll3 and pll7 clocks
ARM: sun5i: chip: Enable the TV Encoder
ARM: sun5i: r8: Add display blocks to the DTSI
ARM: sun5i: a13: Add display and TCON clocks
ARM: dts: ux500: configure the accelerometers open drain
ARM: mx5: dts: Enable USB OTG on M53EVK
ARM: dts: imx6ul-14x14-evk: Add audio support
ARM: dts: imx6qdl: Remove unneeded unit-addresses
...
933 lines
21 KiB
Plaintext
933 lines
21 KiB
Plaintext
/*
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* Device Tree Source for AM33XX SoC
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*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/am33xx.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,am33xx";
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interrupt-parent = <&intc>;
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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d_can0 = &dcan0;
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d_can1 = &dcan1;
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usb0 = &usb0;
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usb1 = &usb1;
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phy0 = &usb0_phy;
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phy1 = &usb1_phy;
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ethernet0 = &cpsw_emac0;
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ethernet1 = &cpsw_emac1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a8";
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device_type = "cpu";
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reg = <0>;
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/*
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* To consider voltage drop between PMIC and SoC,
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* tolerance value is reduced to 2% from 4% and
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* voltage value is increased as a precaution.
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*/
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operating-points = <
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/* kHz uV */
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720000 1285000
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600000 1225000
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500000 1125000
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275000 1125000
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>;
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voltage-tolerance = <2>; /* 2 percentage */
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clocks = <&dpll_mpu_ck>;
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clock-names = "cpu";
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clock-latency = <300000>; /* From omap-cpufreq driver */
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};
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};
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pmu {
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compatible = "arm,cortex-a8-pmu";
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interrupts = <3>;
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};
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/*
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* The soc node represents the soc top level view. It is used for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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};
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/*
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* XXX: Use a flat representation of the AM33XX interconnect.
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* The real AM33XX interconnect network is quite complex. Since
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* it will not bring real advantage to represent that in DT
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* for the moment, just use a fake OCP bus entry to represent
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* the whole bus hierarchy.
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*/
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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l4_wkup: l4_wkup@44c00000 {
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compatible = "ti,am3-l4-wkup", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x44c00000 0x280000>;
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wkup_m3: wkup_m3@100000 {
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compatible = "ti,am3352-wkup-m3";
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reg = <0x100000 0x4000>,
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<0x180000 0x2000>;
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reg-names = "umem", "dmem";
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ti,hwmods = "wkup_m3";
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ti,pm-firmware = "am335x-pm-firmware.elf";
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};
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prcm: prcm@200000 {
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compatible = "ti,am3-prcm";
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reg = <0x200000 0x4000>;
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prcm_clockdomains: clockdomains {
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};
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};
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scm: scm@210000 {
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compatible = "ti,am3-scm", "simple-bus";
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reg = <0x210000 0x2000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x210000 0x2000>;
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am33xx_pinmux: pinmux@800 {
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compatible = "pinctrl-single";
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reg = <0x800 0x238>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x7f>;
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};
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scm_conf: scm_conf@0 {
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compatible = "syscon";
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reg = <0x0 0x800>;
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#address-cells = <1>;
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#size-cells = <1>;
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scm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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wkup_m3_ipc: wkup_m3_ipc@1324 {
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compatible = "ti,am3352-wkup-m3-ipc";
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reg = <0x1324 0x24>;
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interrupts = <78>;
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ti,rproc = <&wkup_m3>;
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mboxes = <&mailbox &mbox_wkupm3>;
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};
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edma_xbar: dma-router@f90 {
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compatible = "ti,am335x-edma-crossbar";
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reg = <0xf90 0x40>;
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#dma-cells = <3>;
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dma-requests = <32>;
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dma-masters = <&edma>;
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};
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scm_clockdomains: clockdomains {
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};
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};
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};
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intc: interrupt-controller@48200000 {
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compatible = "ti,am33xx-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x48200000 0x1000>;
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};
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edma: edma@49000000 {
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compatible = "ti,edma3-tpcc";
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ti,hwmods = "tpcc";
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reg = <0x49000000 0x10000>;
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reg-names = "edma3_cc";
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interrupts = <12 13 14>;
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interrupt-names = "edma3_ccint", "emda3_mperr",
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"edma3_ccerrint";
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dma-requests = <64>;
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#dma-cells = <2>;
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ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
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<&edma_tptc2 0>;
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ti,edma-memcpy-channels = <20 21>;
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};
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edma_tptc0: tptc@49800000 {
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compatible = "ti,edma3-tptc";
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ti,hwmods = "tptc0";
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reg = <0x49800000 0x100000>;
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interrupts = <112>;
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interrupt-names = "edma3_tcerrint";
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};
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edma_tptc1: tptc@49900000 {
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compatible = "ti,edma3-tptc";
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ti,hwmods = "tptc1";
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reg = <0x49900000 0x100000>;
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interrupts = <113>;
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interrupt-names = "edma3_tcerrint";
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};
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edma_tptc2: tptc@49a00000 {
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compatible = "ti,edma3-tptc";
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ti,hwmods = "tptc2";
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reg = <0x49a00000 0x100000>;
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interrupts = <114>;
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interrupt-names = "edma3_tcerrint";
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};
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gpio0: gpio@44e07000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x44e07000 0x1000>;
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interrupts = <96>;
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};
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gpio1: gpio@4804c000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x4804c000 0x1000>;
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interrupts = <98>;
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};
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gpio2: gpio@481ac000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio3";
|
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x481ac000 0x1000>;
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interrupts = <32>;
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};
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gpio3: gpio@481ae000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio4";
|
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gpio-controller;
|
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#gpio-cells = <2>;
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interrupt-controller;
|
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#interrupt-cells = <2>;
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reg = <0x481ae000 0x1000>;
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interrupts = <62>;
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};
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uart0: serial@44e09000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
|
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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reg = <0x44e09000 0x2000>;
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interrupts = <72>;
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status = "disabled";
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dmas = <&edma 26 0>, <&edma 27 0>;
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dma-names = "tx", "rx";
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};
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uart1: serial@48022000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
|
|
ti,hwmods = "uart2";
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clock-frequency = <48000000>;
|
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reg = <0x48022000 0x2000>;
|
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interrupts = <73>;
|
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status = "disabled";
|
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dmas = <&edma 28 0>, <&edma 29 0>;
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dma-names = "tx", "rx";
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};
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uart2: serial@48024000 {
|
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compatible = "ti,am3352-uart", "ti,omap3-uart";
|
|
ti,hwmods = "uart3";
|
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clock-frequency = <48000000>;
|
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reg = <0x48024000 0x2000>;
|
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interrupts = <74>;
|
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status = "disabled";
|
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dmas = <&edma 30 0>, <&edma 31 0>;
|
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dma-names = "tx", "rx";
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};
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|
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uart3: serial@481a6000 {
|
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compatible = "ti,am3352-uart", "ti,omap3-uart";
|
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ti,hwmods = "uart4";
|
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clock-frequency = <48000000>;
|
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reg = <0x481a6000 0x2000>;
|
|
interrupts = <44>;
|
|
status = "disabled";
|
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};
|
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|
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uart4: serial@481a8000 {
|
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compatible = "ti,am3352-uart", "ti,omap3-uart";
|
|
ti,hwmods = "uart5";
|
|
clock-frequency = <48000000>;
|
|
reg = <0x481a8000 0x2000>;
|
|
interrupts = <45>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart5: serial@481aa000 {
|
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compatible = "ti,am3352-uart", "ti,omap3-uart";
|
|
ti,hwmods = "uart6";
|
|
clock-frequency = <48000000>;
|
|
reg = <0x481aa000 0x2000>;
|
|
interrupts = <46>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c0: i2c@44e0b000 {
|
|
compatible = "ti,omap4-i2c";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
ti,hwmods = "i2c1";
|
|
reg = <0x44e0b000 0x1000>;
|
|
interrupts = <70>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@4802a000 {
|
|
compatible = "ti,omap4-i2c";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
ti,hwmods = "i2c2";
|
|
reg = <0x4802a000 0x1000>;
|
|
interrupts = <71>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c2: i2c@4819c000 {
|
|
compatible = "ti,omap4-i2c";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
ti,hwmods = "i2c3";
|
|
reg = <0x4819c000 0x1000>;
|
|
interrupts = <30>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mmc1: mmc@48060000 {
|
|
compatible = "ti,omap4-hsmmc";
|
|
ti,hwmods = "mmc1";
|
|
ti,dual-volt;
|
|
ti,needs-special-reset;
|
|
ti,needs-special-hs-handling;
|
|
dmas = <&edma_xbar 24 0 0
|
|
&edma_xbar 25 0 0>;
|
|
dma-names = "tx", "rx";
|
|
interrupts = <64>;
|
|
interrupt-parent = <&intc>;
|
|
reg = <0x48060000 0x1000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mmc2: mmc@481d8000 {
|
|
compatible = "ti,omap4-hsmmc";
|
|
ti,hwmods = "mmc2";
|
|
ti,needs-special-reset;
|
|
dmas = <&edma 2 0
|
|
&edma 3 0>;
|
|
dma-names = "tx", "rx";
|
|
interrupts = <28>;
|
|
interrupt-parent = <&intc>;
|
|
reg = <0x481d8000 0x1000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mmc3: mmc@47810000 {
|
|
compatible = "ti,omap4-hsmmc";
|
|
ti,hwmods = "mmc3";
|
|
ti,needs-special-reset;
|
|
interrupts = <29>;
|
|
interrupt-parent = <&intc>;
|
|
reg = <0x47810000 0x1000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hwspinlock: spinlock@480ca000 {
|
|
compatible = "ti,omap4-hwspinlock";
|
|
reg = <0x480ca000 0x1000>;
|
|
ti,hwmods = "spinlock";
|
|
#hwlock-cells = <1>;
|
|
};
|
|
|
|
wdt2: wdt@44e35000 {
|
|
compatible = "ti,omap3-wdt";
|
|
ti,hwmods = "wd_timer2";
|
|
reg = <0x44e35000 0x1000>;
|
|
interrupts = <91>;
|
|
};
|
|
|
|
dcan0: can@481cc000 {
|
|
compatible = "ti,am3352-d_can";
|
|
ti,hwmods = "d_can0";
|
|
reg = <0x481cc000 0x2000>;
|
|
clocks = <&dcan0_fck>;
|
|
clock-names = "fck";
|
|
syscon-raminit = <&scm_conf 0x644 0>;
|
|
interrupts = <52>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dcan1: can@481d0000 {
|
|
compatible = "ti,am3352-d_can";
|
|
ti,hwmods = "d_can1";
|
|
reg = <0x481d0000 0x2000>;
|
|
clocks = <&dcan1_fck>;
|
|
clock-names = "fck";
|
|
syscon-raminit = <&scm_conf 0x644 1>;
|
|
interrupts = <55>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mailbox: mailbox@480C8000 {
|
|
compatible = "ti,omap4-mailbox";
|
|
reg = <0x480C8000 0x200>;
|
|
interrupts = <77>;
|
|
ti,hwmods = "mailbox";
|
|
#mbox-cells = <1>;
|
|
ti,mbox-num-users = <4>;
|
|
ti,mbox-num-fifos = <8>;
|
|
mbox_wkupm3: wkup_m3 {
|
|
ti,mbox-send-noirq;
|
|
ti,mbox-tx = <0 0 0>;
|
|
ti,mbox-rx = <0 0 3>;
|
|
};
|
|
};
|
|
|
|
timer1: timer@44e31000 {
|
|
compatible = "ti,am335x-timer-1ms";
|
|
reg = <0x44e31000 0x400>;
|
|
interrupts = <67>;
|
|
ti,hwmods = "timer1";
|
|
ti,timer-alwon;
|
|
};
|
|
|
|
timer2: timer@48040000 {
|
|
compatible = "ti,am335x-timer";
|
|
reg = <0x48040000 0x400>;
|
|
interrupts = <68>;
|
|
ti,hwmods = "timer2";
|
|
};
|
|
|
|
timer3: timer@48042000 {
|
|
compatible = "ti,am335x-timer";
|
|
reg = <0x48042000 0x400>;
|
|
interrupts = <69>;
|
|
ti,hwmods = "timer3";
|
|
};
|
|
|
|
timer4: timer@48044000 {
|
|
compatible = "ti,am335x-timer";
|
|
reg = <0x48044000 0x400>;
|
|
interrupts = <92>;
|
|
ti,hwmods = "timer4";
|
|
ti,timer-pwm;
|
|
};
|
|
|
|
timer5: timer@48046000 {
|
|
compatible = "ti,am335x-timer";
|
|
reg = <0x48046000 0x400>;
|
|
interrupts = <93>;
|
|
ti,hwmods = "timer5";
|
|
ti,timer-pwm;
|
|
};
|
|
|
|
timer6: timer@48048000 {
|
|
compatible = "ti,am335x-timer";
|
|
reg = <0x48048000 0x400>;
|
|
interrupts = <94>;
|
|
ti,hwmods = "timer6";
|
|
ti,timer-pwm;
|
|
};
|
|
|
|
timer7: timer@4804a000 {
|
|
compatible = "ti,am335x-timer";
|
|
reg = <0x4804a000 0x400>;
|
|
interrupts = <95>;
|
|
ti,hwmods = "timer7";
|
|
ti,timer-pwm;
|
|
};
|
|
|
|
rtc: rtc@44e3e000 {
|
|
compatible = "ti,am3352-rtc", "ti,da830-rtc";
|
|
reg = <0x44e3e000 0x1000>;
|
|
interrupts = <75
|
|
76>;
|
|
ti,hwmods = "rtc";
|
|
};
|
|
|
|
spi0: spi@48030000 {
|
|
compatible = "ti,omap4-mcspi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x48030000 0x400>;
|
|
interrupts = <65>;
|
|
ti,spi-num-cs = <2>;
|
|
ti,hwmods = "spi0";
|
|
dmas = <&edma 16 0
|
|
&edma 17 0
|
|
&edma 18 0
|
|
&edma 19 0>;
|
|
dma-names = "tx0", "rx0", "tx1", "rx1";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi1: spi@481a0000 {
|
|
compatible = "ti,omap4-mcspi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x481a0000 0x400>;
|
|
interrupts = <125>;
|
|
ti,spi-num-cs = <2>;
|
|
ti,hwmods = "spi1";
|
|
dmas = <&edma 42 0
|
|
&edma 43 0
|
|
&edma 44 0
|
|
&edma 45 0>;
|
|
dma-names = "tx0", "rx0", "tx1", "rx1";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb: usb@47400000 {
|
|
compatible = "ti,am33xx-usb";
|
|
reg = <0x47400000 0x1000>;
|
|
ranges;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ti,hwmods = "usb_otg_hs";
|
|
status = "disabled";
|
|
|
|
usb_ctrl_mod: control@44e10620 {
|
|
compatible = "ti,am335x-usb-ctrl-module";
|
|
reg = <0x44e10620 0x10
|
|
0x44e10648 0x4>;
|
|
reg-names = "phy_ctrl", "wakeup";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0_phy: usb-phy@47401300 {
|
|
compatible = "ti,am335x-usb-phy";
|
|
reg = <0x47401300 0x100>;
|
|
reg-names = "phy";
|
|
status = "disabled";
|
|
ti,ctrl_mod = <&usb_ctrl_mod>;
|
|
};
|
|
|
|
usb0: usb@47401000 {
|
|
compatible = "ti,musb-am33xx";
|
|
status = "disabled";
|
|
reg = <0x47401400 0x400
|
|
0x47401000 0x200>;
|
|
reg-names = "mc", "control";
|
|
|
|
interrupts = <18>;
|
|
interrupt-names = "mc";
|
|
dr_mode = "otg";
|
|
mentor,multipoint = <1>;
|
|
mentor,num-eps = <16>;
|
|
mentor,ram-bits = <12>;
|
|
mentor,power = <500>;
|
|
phys = <&usb0_phy>;
|
|
|
|
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
|
|
&cppi41dma 2 0 &cppi41dma 3 0
|
|
&cppi41dma 4 0 &cppi41dma 5 0
|
|
&cppi41dma 6 0 &cppi41dma 7 0
|
|
&cppi41dma 8 0 &cppi41dma 9 0
|
|
&cppi41dma 10 0 &cppi41dma 11 0
|
|
&cppi41dma 12 0 &cppi41dma 13 0
|
|
&cppi41dma 14 0 &cppi41dma 0 1
|
|
&cppi41dma 1 1 &cppi41dma 2 1
|
|
&cppi41dma 3 1 &cppi41dma 4 1
|
|
&cppi41dma 5 1 &cppi41dma 6 1
|
|
&cppi41dma 7 1 &cppi41dma 8 1
|
|
&cppi41dma 9 1 &cppi41dma 10 1
|
|
&cppi41dma 11 1 &cppi41dma 12 1
|
|
&cppi41dma 13 1 &cppi41dma 14 1>;
|
|
dma-names =
|
|
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
|
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
|
"rx14", "rx15",
|
|
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
|
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
|
"tx14", "tx15";
|
|
};
|
|
|
|
usb1_phy: usb-phy@47401b00 {
|
|
compatible = "ti,am335x-usb-phy";
|
|
reg = <0x47401b00 0x100>;
|
|
reg-names = "phy";
|
|
status = "disabled";
|
|
ti,ctrl_mod = <&usb_ctrl_mod>;
|
|
};
|
|
|
|
usb1: usb@47401800 {
|
|
compatible = "ti,musb-am33xx";
|
|
status = "disabled";
|
|
reg = <0x47401c00 0x400
|
|
0x47401800 0x200>;
|
|
reg-names = "mc", "control";
|
|
interrupts = <19>;
|
|
interrupt-names = "mc";
|
|
dr_mode = "otg";
|
|
mentor,multipoint = <1>;
|
|
mentor,num-eps = <16>;
|
|
mentor,ram-bits = <12>;
|
|
mentor,power = <500>;
|
|
phys = <&usb1_phy>;
|
|
|
|
dmas = <&cppi41dma 15 0 &cppi41dma 16 0
|
|
&cppi41dma 17 0 &cppi41dma 18 0
|
|
&cppi41dma 19 0 &cppi41dma 20 0
|
|
&cppi41dma 21 0 &cppi41dma 22 0
|
|
&cppi41dma 23 0 &cppi41dma 24 0
|
|
&cppi41dma 25 0 &cppi41dma 26 0
|
|
&cppi41dma 27 0 &cppi41dma 28 0
|
|
&cppi41dma 29 0 &cppi41dma 15 1
|
|
&cppi41dma 16 1 &cppi41dma 17 1
|
|
&cppi41dma 18 1 &cppi41dma 19 1
|
|
&cppi41dma 20 1 &cppi41dma 21 1
|
|
&cppi41dma 22 1 &cppi41dma 23 1
|
|
&cppi41dma 24 1 &cppi41dma 25 1
|
|
&cppi41dma 26 1 &cppi41dma 27 1
|
|
&cppi41dma 28 1 &cppi41dma 29 1>;
|
|
dma-names =
|
|
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
|
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
|
"rx14", "rx15",
|
|
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
|
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
|
"tx14", "tx15";
|
|
};
|
|
|
|
cppi41dma: dma-controller@47402000 {
|
|
compatible = "ti,am3359-cppi41";
|
|
reg = <0x47400000 0x1000
|
|
0x47402000 0x1000
|
|
0x47403000 0x1000
|
|
0x47404000 0x4000>;
|
|
reg-names = "glue", "controller", "scheduler", "queuemgr";
|
|
interrupts = <17>;
|
|
interrupt-names = "glue";
|
|
#dma-cells = <2>;
|
|
#dma-channels = <30>;
|
|
#dma-requests = <256>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss0: epwmss@48300000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48300000 0x10>;
|
|
ti,hwmods = "epwmss0";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
|
|
0x48300180 0x48300180 0x80 /* EQEP */
|
|
0x48300200 0x48300200 0x80>; /* EHRPWM */
|
|
|
|
ecap0: ecap@48300100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48300100 0x80>;
|
|
interrupts = <31>;
|
|
interrupt-names = "ecap0";
|
|
ti,hwmods = "ecap0";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm0: pwm@48300200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48300200 0x80>;
|
|
ti,hwmods = "ehrpwm0";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss1: epwmss@48302000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48302000 0x10>;
|
|
ti,hwmods = "epwmss1";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48302100 0x48302100 0x80 /* ECAP */
|
|
0x48302180 0x48302180 0x80 /* EQEP */
|
|
0x48302200 0x48302200 0x80>; /* EHRPWM */
|
|
|
|
ecap1: ecap@48302100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48302100 0x80>;
|
|
interrupts = <47>;
|
|
interrupt-names = "ecap1";
|
|
ti,hwmods = "ecap1";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm1: pwm@48302200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48302200 0x80>;
|
|
ti,hwmods = "ehrpwm1";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss2: epwmss@48304000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48304000 0x10>;
|
|
ti,hwmods = "epwmss2";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48304100 0x48304100 0x80 /* ECAP */
|
|
0x48304180 0x48304180 0x80 /* EQEP */
|
|
0x48304200 0x48304200 0x80>; /* EHRPWM */
|
|
|
|
ecap2: ecap@48304100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48304100 0x80>;
|
|
interrupts = <61>;
|
|
interrupt-names = "ecap2";
|
|
ti,hwmods = "ecap2";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm2: pwm@48304200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48304200 0x80>;
|
|
ti,hwmods = "ehrpwm2";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
mac: ethernet@4a100000 {
|
|
compatible = "ti,am335x-cpsw","ti,cpsw";
|
|
ti,hwmods = "cpgmac0";
|
|
clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
|
|
clock-names = "fck", "cpts";
|
|
cpdma_channels = <8>;
|
|
ale_entries = <1024>;
|
|
bd_ram_size = <0x2000>;
|
|
no_bd_ram = <0>;
|
|
rx_descs = <64>;
|
|
mac_control = <0x20>;
|
|
slaves = <2>;
|
|
active_slave = <0>;
|
|
cpts_clock_mult = <0x80000000>;
|
|
cpts_clock_shift = <29>;
|
|
reg = <0x4a100000 0x800
|
|
0x4a101200 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-parent = <&intc>;
|
|
/*
|
|
* c0_rx_thresh_pend
|
|
* c0_rx_pend
|
|
* c0_tx_pend
|
|
* c0_misc_pend
|
|
*/
|
|
interrupts = <40 41 42 43>;
|
|
ranges;
|
|
syscon = <&scm_conf>;
|
|
status = "disabled";
|
|
|
|
davinci_mdio: mdio@4a101000 {
|
|
compatible = "ti,davinci_mdio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
ti,hwmods = "davinci_mdio";
|
|
bus_freq = <1000000>;
|
|
reg = <0x4a101000 0x100>;
|
|
status = "disabled";
|
|
};
|
|
|
|
cpsw_emac0: slave@4a100200 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
};
|
|
|
|
cpsw_emac1: slave@4a100300 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
};
|
|
|
|
phy_sel: cpsw-phy-sel@44e10650 {
|
|
compatible = "ti,am3352-cpsw-phy-sel";
|
|
reg= <0x44e10650 0x4>;
|
|
reg-names = "gmii-sel";
|
|
};
|
|
};
|
|
|
|
ocmcram: ocmcram@40300000 {
|
|
compatible = "mmio-sram";
|
|
reg = <0x40300000 0x10000>; /* 64k */
|
|
};
|
|
|
|
elm: elm@48080000 {
|
|
compatible = "ti,am3352-elm";
|
|
reg = <0x48080000 0x2000>;
|
|
interrupts = <4>;
|
|
ti,hwmods = "elm";
|
|
status = "disabled";
|
|
};
|
|
|
|
lcdc: lcdc@4830e000 {
|
|
compatible = "ti,am33xx-tilcdc";
|
|
reg = <0x4830e000 0x1000>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <36>;
|
|
ti,hwmods = "lcdc";
|
|
status = "disabled";
|
|
};
|
|
|
|
tscadc: tscadc@44e0d000 {
|
|
compatible = "ti,am3359-tscadc";
|
|
reg = <0x44e0d000 0x1000>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <16>;
|
|
ti,hwmods = "adc_tsc";
|
|
status = "disabled";
|
|
|
|
tsc {
|
|
compatible = "ti,am3359-tsc";
|
|
};
|
|
am335x_adc: adc {
|
|
#io-channel-cells = <1>;
|
|
compatible = "ti,am3359-adc";
|
|
};
|
|
};
|
|
|
|
gpmc: gpmc@50000000 {
|
|
compatible = "ti,am3352-gpmc";
|
|
ti,hwmods = "gpmc";
|
|
ti,no-idle-on-init;
|
|
reg = <0x50000000 0x2000>;
|
|
interrupts = <100>;
|
|
dmas = <&edma 52 0>;
|
|
dma-names = "rxtx";
|
|
gpmc,num-cs = <7>;
|
|
gpmc,num-waitpins = <2>;
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sham: sham@53100000 {
|
|
compatible = "ti,omap4-sham";
|
|
ti,hwmods = "sham";
|
|
reg = <0x53100000 0x200>;
|
|
interrupts = <109>;
|
|
dmas = <&edma 36 0>;
|
|
dma-names = "rx";
|
|
};
|
|
|
|
aes: aes@53500000 {
|
|
compatible = "ti,omap4-aes";
|
|
ti,hwmods = "aes";
|
|
reg = <0x53500000 0xa0>;
|
|
interrupts = <103>;
|
|
dmas = <&edma 6 0>,
|
|
<&edma 5 0>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcasp0: mcasp@48038000 {
|
|
compatible = "ti,am33xx-mcasp-audio";
|
|
ti,hwmods = "mcasp0";
|
|
reg = <0x48038000 0x2000>,
|
|
<0x46000000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <80>, <81>;
|
|
interrupt-names = "tx", "rx";
|
|
status = "disabled";
|
|
dmas = <&edma 8 2>,
|
|
<&edma 9 2>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcasp1: mcasp@4803C000 {
|
|
compatible = "ti,am33xx-mcasp-audio";
|
|
ti,hwmods = "mcasp1";
|
|
reg = <0x4803C000 0x2000>,
|
|
<0x46400000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <82>, <83>;
|
|
interrupt-names = "tx", "rx";
|
|
status = "disabled";
|
|
dmas = <&edma 10 2>,
|
|
<&edma 11 2>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
rng: rng@48310000 {
|
|
compatible = "ti,omap4-rng";
|
|
ti,hwmods = "rng";
|
|
reg = <0x48310000 0x2000>;
|
|
interrupts = <111>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/include/ "am33xx-clocks.dtsi"
|