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30648e9f86
We will move the FSL QSPI driver to the SPI framework soon. To prepare and to make sure the full buswidth is used (as it is with the current driver), let's add the right properties. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
167 lines
2.6 KiB
Plaintext
167 lines
2.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for Freescale LS2080A QDS Board.
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*
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* Copyright 2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*
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* Abhimanyu Saini <abhimanyu.saini@nxp.com>
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*
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*/
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&esdhc {
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mmc-hs200-1_8v;
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status = "okay";
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};
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&ifc {
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status = "okay";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x5 0x80000000 0x08000000
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0x2 0x0 0x5 0x30000000 0x00010000
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0x3 0x0 0x5 0x20000000 0x00010000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x8000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@2,0 {
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compatible = "fsl,ifc-nand";
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reg = <0x2 0x0 0x10000>;
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};
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cpld@3,0 {
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reg = <0x3 0x0 0x10000>;
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compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
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};
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};
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&i2c0 {
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status = "okay";
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pca9547@77 {
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compatible = "nxp,pca9547";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00>;
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rtc@68 {
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compatible = "dallas,ds3232";
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reg = <0x68>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x02>;
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ina220@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <500>;
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};
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ina220@41 {
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compatible = "ti,ina220";
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reg = <0x41>;
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shunt-resistor = <1000>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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adt7481@4c {
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compatible = "adi,adt7461";
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reg = <0x4c>;
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};
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};
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};
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};
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&i2c1 {
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status = "disabled";
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};
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&i2c2 {
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status = "disabled";
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};
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&i2c3 {
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status = "disabled";
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};
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&dspi {
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status = "okay";
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dflash0: n25q128a@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <3000000>;
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reg = <0>;
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};
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dflash1: sst25wf040b@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <3000000>;
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reg = <1>;
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};
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dflash2: en25s64@2 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <3000000>;
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reg = <2>;
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};
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};
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&qspi {
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status = "okay";
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flash0: s25fl256s1@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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};
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flash2: s25fl256s1@2 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <2>;
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};
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};
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&sata0 {
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status = "okay";
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};
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&sata1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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