mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 00:06:48 +07:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
299 lines
6.3 KiB
C
299 lines
6.3 KiB
C
/*
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* ibm_ocp_phy.c
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*
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* PHY drivers for the ibm ocp ethernet driver. Borrowed
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* from sungem_phy.c, though I only kept the generic MII
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* driver for now.
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*
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* This file should be shared with other drivers or eventually
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* merged as the "low level" part of miilib
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*
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* (c) 2003, Benjamin Herrenscmidt (benh@kernel.crashing.org)
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*
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/delay.h>
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#include "ibm_emac_phy.h"
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static int reset_one_mii_phy(struct mii_phy *phy, int phy_id)
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{
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u16 val;
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int limit = 10000;
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val = __phy_read(phy, phy_id, MII_BMCR);
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val &= ~BMCR_ISOLATE;
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val |= BMCR_RESET;
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__phy_write(phy, phy_id, MII_BMCR, val);
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udelay(100);
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while (limit--) {
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val = __phy_read(phy, phy_id, MII_BMCR);
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if ((val & BMCR_RESET) == 0)
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break;
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udelay(10);
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}
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if ((val & BMCR_ISOLATE) && limit > 0)
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__phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE);
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return (limit <= 0);
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}
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static int cis8201_init(struct mii_phy *phy)
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{
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u16 epcr;
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epcr = phy_read(phy, MII_CIS8201_EPCR);
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epcr &= ~EPCR_MODE_MASK;
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switch (phy->mode) {
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case PHY_MODE_TBI:
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epcr |= EPCR_TBI_MODE;
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break;
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case PHY_MODE_RTBI:
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epcr |= EPCR_RTBI_MODE;
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break;
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case PHY_MODE_GMII:
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epcr |= EPCR_GMII_MODE;
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break;
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case PHY_MODE_RGMII:
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default:
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epcr |= EPCR_RGMII_MODE;
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}
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phy_write(phy, MII_CIS8201_EPCR, epcr);
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return 0;
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}
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static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
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{
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u16 ctl, adv;
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phy->autoneg = 1;
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phy->speed = SPEED_10;
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phy->duplex = DUPLEX_HALF;
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phy->pause = 0;
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phy->advertising = advertise;
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/* Setup standard advertise */
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adv = phy_read(phy, MII_ADVERTISE);
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adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
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if (advertise & ADVERTISED_10baseT_Half)
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adv |= ADVERTISE_10HALF;
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if (advertise & ADVERTISED_10baseT_Full)
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adv |= ADVERTISE_10FULL;
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if (advertise & ADVERTISED_100baseT_Half)
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adv |= ADVERTISE_100HALF;
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if (advertise & ADVERTISED_100baseT_Full)
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adv |= ADVERTISE_100FULL;
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phy_write(phy, MII_ADVERTISE, adv);
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/* Start/Restart aneg */
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ctl = phy_read(phy, MII_BMCR);
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ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
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phy_write(phy, MII_BMCR, ctl);
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return 0;
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}
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static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
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{
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u16 ctl;
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phy->autoneg = 0;
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phy->speed = speed;
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phy->duplex = fd;
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phy->pause = 0;
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ctl = phy_read(phy, MII_BMCR);
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ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_ANENABLE);
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/* First reset the PHY */
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phy_write(phy, MII_BMCR, ctl | BMCR_RESET);
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/* Select speed & duplex */
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switch (speed) {
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case SPEED_10:
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break;
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case SPEED_100:
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ctl |= BMCR_SPEED100;
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break;
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case SPEED_1000:
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default:
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return -EINVAL;
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}
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if (fd == DUPLEX_FULL)
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ctl |= BMCR_FULLDPLX;
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phy_write(phy, MII_BMCR, ctl);
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return 0;
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}
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static int genmii_poll_link(struct mii_phy *phy)
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{
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u16 status;
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(void)phy_read(phy, MII_BMSR);
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status = phy_read(phy, MII_BMSR);
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if ((status & BMSR_LSTATUS) == 0)
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return 0;
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if (phy->autoneg && !(status & BMSR_ANEGCOMPLETE))
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return 0;
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return 1;
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}
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#define MII_CIS8201_ACSR 0x1c
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#define ACSR_DUPLEX_STATUS 0x0020
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#define ACSR_SPEED_1000BASET 0x0010
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#define ACSR_SPEED_100BASET 0x0008
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static int cis8201_read_link(struct mii_phy *phy)
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{
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u16 acsr;
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if (phy->autoneg) {
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acsr = phy_read(phy, MII_CIS8201_ACSR);
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if (acsr & ACSR_DUPLEX_STATUS)
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phy->duplex = DUPLEX_FULL;
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else
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phy->duplex = DUPLEX_HALF;
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if (acsr & ACSR_SPEED_1000BASET) {
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phy->speed = SPEED_1000;
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} else if (acsr & ACSR_SPEED_100BASET)
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phy->speed = SPEED_100;
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else
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phy->speed = SPEED_10;
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phy->pause = 0;
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}
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/* On non-aneg, we assume what we put in BMCR is the speed,
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* though magic-aneg shouldn't prevent this case from occurring
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*/
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return 0;
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}
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static int genmii_read_link(struct mii_phy *phy)
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{
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u16 lpa;
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if (phy->autoneg) {
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lpa = phy_read(phy, MII_LPA) & phy_read(phy, MII_ADVERTISE);
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phy->speed = SPEED_10;
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phy->duplex = DUPLEX_HALF;
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phy->pause = 0;
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if (lpa & (LPA_100FULL | LPA_100HALF)) {
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phy->speed = SPEED_100;
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if (lpa & LPA_100FULL)
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phy->duplex = DUPLEX_FULL;
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} else if (lpa & LPA_10FULL)
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phy->duplex = DUPLEX_FULL;
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}
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/* On non-aneg, we assume what we put in BMCR is the speed,
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* though magic-aneg shouldn't prevent this case from occurring
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*/
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return 0;
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}
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#define MII_BASIC_FEATURES (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | \
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SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \
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SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII)
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#define MII_GBIT_FEATURES (MII_BASIC_FEATURES | \
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SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full)
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/* CIS8201 phy ops */
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static struct mii_phy_ops cis8201_phy_ops = {
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init:cis8201_init,
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setup_aneg:genmii_setup_aneg,
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setup_forced:genmii_setup_forced,
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poll_link:genmii_poll_link,
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read_link:cis8201_read_link
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};
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/* Generic implementation for most 10/100 PHYs */
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static struct mii_phy_ops generic_phy_ops = {
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setup_aneg:genmii_setup_aneg,
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setup_forced:genmii_setup_forced,
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poll_link:genmii_poll_link,
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read_link:genmii_read_link
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};
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static struct mii_phy_def cis8201_phy_def = {
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phy_id:0x000fc410,
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phy_id_mask:0x000ffff0,
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name:"CIS8201 Gigabit Ethernet",
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features:MII_GBIT_FEATURES,
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magic_aneg:0,
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ops:&cis8201_phy_ops
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};
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static struct mii_phy_def genmii_phy_def = {
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phy_id:0x00000000,
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phy_id_mask:0x00000000,
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name:"Generic MII",
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features:MII_BASIC_FEATURES,
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magic_aneg:0,
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ops:&generic_phy_ops
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};
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static struct mii_phy_def *mii_phy_table[] = {
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&cis8201_phy_def,
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&genmii_phy_def,
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NULL
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};
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int mii_phy_probe(struct mii_phy *phy, int mii_id)
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{
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int rc;
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u32 id;
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struct mii_phy_def *def;
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int i;
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phy->autoneg = 0;
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phy->advertising = 0;
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phy->mii_id = mii_id;
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phy->speed = 0;
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phy->duplex = 0;
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phy->pause = 0;
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/* Take PHY out of isloate mode and reset it. */
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rc = reset_one_mii_phy(phy, mii_id);
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if (rc)
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return -ENODEV;
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/* Read ID and find matching entry */
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id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2))
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& 0xfffffff0;
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for (i = 0; (def = mii_phy_table[i]) != NULL; i++)
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if ((id & def->phy_id_mask) == def->phy_id)
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break;
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/* Should never be NULL (we have a generic entry), but... */
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if (def == NULL)
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return -ENODEV;
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phy->def = def;
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/* Setup default advertising */
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phy->advertising = def->features;
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return 0;
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}
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MODULE_LICENSE("GPL");
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