Ben Hutchings 8376efd31d x86, pmem: Fix cache flushing for iovec write < 8 bytes ... Commit 11e63f6d92 added cache flushing for unaligned writes from an iovec, covering the first and last cache line of a >= 8 byte write and the first cache line of a < 8 byte write. But an unaligned write of 2-7 bytes can still cover two cache lines, so make sure we flush both in that case. Cc: <stable@vger.kernel.org> Fixes: 11e63f6d92 ("x86, pmem: fix broken __copy_user_nocache ...") Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Dan Williams <dan.j.williams@intel.com>		2017-05-09 10:09:26 -07:00
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asm	x86, pmem: Fix cache flushing for iovec write < 8 bytes	2017-05-09 10:09:26 -07:00
uapi/asm	Drivers: hv: Base autoeoi enablement based on hypervisor hints	2017-03-17 15:10:49 +09:00