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This adds device tree bindings for the Intel IXP4xx AHB Queue Manager. Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
50 lines
1.4 KiB
YAML
50 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 Linaro Ltd.
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/misc/intel-ixp4xx-ahb-queue-manager.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Intel IXP4xx AHB Queue Manager
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maintainers:
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- Linus Walleij <linus.walleij@linaro.org>
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description: |
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The IXP4xx AHB Queue Manager maintains queues as circular buffers in
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an 8KB embedded SRAM along with hardware pointers. It is used by both
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the XScale processor and the NPEs (Network Processing Units) in the
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IXP4xx for accelerating queues, especially for networking. Clients pick
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queues from the queue manager with foo-queue = <&qmgr N> where the
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&qmgr is a phandle to the queue manager and N is the queue resource
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number. The queue resources available and their specific purpose
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on a certain IXP4xx system will vary.
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properties:
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compatible:
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items:
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- const: intel,ixp4xx-ahb-queue-manager
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: Interrupt for queues 0-31
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- description: Interrupt for queues 32-63
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required:
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- compatible
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- reg
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- interrupts
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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qmgr: queue-manager@60000000 {
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compatible = "intel,ixp4xx-ahb-queue-manager";
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reg = <0x60000000 0x4000>;
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interrupts = <3 IRQ_TYPE_LEVEL_HIGH>, <4 IRQ_TYPE_LEVEL_HIGH>;
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};
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