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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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07c94a3812
Reorganize the E400 detection now that we have everything in place: switch the CPUs to broadcast mode after the LAPIC has been initialized and remove the facilities that were used previously on the idle path. Unfortunately static_cpu_has_bug() cannpt be used in the E400 idle routine because alternatives have been applied when the actual detection happens, so the static switching does not take effect and the test will stay false. Use boot_cpu_has_bug() instead which is definitely an improvement over the RDMSR and the cpumask handling. Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Jiri Olsa <jolsa@redhat.com> Link: http://lkml.kernel.org/r/20161209182912.2726-5-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
175 lines
4.6 KiB
C
175 lines
4.6 KiB
C
#ifndef _ASM_X86_ACPI_H
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#define _ASM_X86_ACPI_H
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/*
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* Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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* Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#include <acpi/pdc_intel.h>
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#include <asm/numa.h>
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#include <asm/fixmap.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/mpspec.h>
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#include <asm/realmode.h>
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#ifdef CONFIG_ACPI_APEI
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# include <asm/pgtable_types.h>
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#endif
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#ifdef CONFIG_ACPI
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extern int acpi_lapic;
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extern int acpi_ioapic;
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extern int acpi_noirq;
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extern int acpi_strict;
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extern int acpi_disabled;
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extern int acpi_pci_disabled;
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extern int acpi_skip_timer_override;
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extern int acpi_use_timer_override;
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extern int acpi_fix_pin2_polarity;
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extern int acpi_disable_cmcff;
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extern u8 acpi_sci_flags;
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extern int acpi_sci_override_gsi;
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void acpi_pic_sci_set_trigger(unsigned int, u16);
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extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
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int trigger, int polarity);
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extern void (*__acpi_unregister_gsi)(u32 gsi);
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static inline void disable_acpi(void)
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{
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acpi_disabled = 1;
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acpi_pci_disabled = 1;
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acpi_noirq = 1;
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}
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extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
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static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
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static inline void acpi_disable_pci(void)
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{
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acpi_pci_disabled = 1;
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acpi_noirq_set();
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}
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/* Low-level suspend routine. */
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extern int (*acpi_suspend_lowlevel)(void);
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/* Physical address to resume after wakeup */
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#define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start))
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/*
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* Check if the CPU can handle C2 and deeper
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*/
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static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
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{
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/*
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* Early models (<=5) of AMD Opterons are not supposed to go into
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* C2 state.
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*
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* Steppings 0x0A and later are good
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*/
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if (boot_cpu_data.x86 == 0x0F &&
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boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
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boot_cpu_data.x86_model <= 0x05 &&
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boot_cpu_data.x86_mask < 0x0A)
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return 1;
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else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E))
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return 1;
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else
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return max_cstate;
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}
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static inline bool arch_has_acpi_pdc(void)
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{
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struct cpuinfo_x86 *c = &cpu_data(0);
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return (c->x86_vendor == X86_VENDOR_INTEL ||
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c->x86_vendor == X86_VENDOR_CENTAUR);
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}
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static inline void arch_acpi_set_pdc_bits(u32 *buf)
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{
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struct cpuinfo_x86 *c = &cpu_data(0);
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buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
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if (cpu_has(c, X86_FEATURE_EST))
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buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
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if (cpu_has(c, X86_FEATURE_ACPI))
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buf[2] |= ACPI_PDC_T_FFH;
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/*
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* If mwait/monitor is unsupported, C2/C3_FFH will be disabled
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*/
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if (!cpu_has(c, X86_FEATURE_MWAIT))
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buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
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}
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static inline bool acpi_has_cpu_in_madt(void)
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{
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return !!acpi_lapic;
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}
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#else /* !CONFIG_ACPI */
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#define acpi_lapic 0
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#define acpi_ioapic 0
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#define acpi_disable_cmcff 0
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static inline void acpi_noirq_set(void) { }
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static inline void acpi_disable_pci(void) { }
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static inline void disable_acpi(void) { }
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#endif /* !CONFIG_ACPI */
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#define ARCH_HAS_POWER_INIT 1
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#ifdef CONFIG_ACPI_NUMA
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extern int x86_acpi_numa_init(void);
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#endif /* CONFIG_ACPI_NUMA */
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#define acpi_unlazy_tlb(x) leave_mm(x)
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#ifdef CONFIG_ACPI_APEI
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static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
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{
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/*
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* We currently have no way to look up the EFI memory map
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* attributes for a region in a consistent way, because the
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* memmap is discarded after efi_free_boot_services(). So if
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* you call efi_mem_attributes() during boot and at runtime,
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* you could theoretically see different attributes.
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*
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* Since we are yet to see any x86 platforms that require
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* anything other than PAGE_KERNEL (some arm64 platforms
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* require the equivalent of PAGE_KERNEL_NOCACHE), return that
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* until we know differently.
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*/
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return PAGE_KERNEL;
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}
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#endif
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#define ACPI_TABLE_UPGRADE_MAX_PHYS (max_low_pfn_mapped << PAGE_SHIFT)
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#endif /* _ASM_X86_ACPI_H */
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