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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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82c849eb36
request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. setup_irq() was required in older kernels as the memory allocator was not available during early boot. Hence replace setup_irq() by request_irq(). Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Matt Turner <mattst88@gmail.com> Link: https://lkml.kernel.org/r/51f8ae7da9f47a23596388141933efa2bdef317b.1585320721.git.afzal.mohd.ma@gmail.com
181 lines
4.6 KiB
C
181 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/alpha/kernel/sys_sx164.c
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*
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* Copyright (C) 1995 David A Rusling
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* Copyright (C) 1996 Jay A Estabrook
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* Copyright (C) 1998, 1999, 2000 Richard Henderson
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*
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* Code supporting the SX164 (PCA56+PYXIS).
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <asm/ptrace.h>
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#include <asm/dma.h>
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#include <asm/irq.h>
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#include <asm/mmu_context.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/core_cia.h>
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#include <asm/hwrpb.h>
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#include <asm/tlbflush.h>
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#include <asm/special_insns.h>
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#include "proto.h"
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#include "irq_impl.h"
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#include "pci_impl.h"
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#include "machvec_impl.h"
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static void __init
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sx164_init_irq(void)
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{
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outb(0, DMA1_RESET_REG);
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outb(0, DMA2_RESET_REG);
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outb(DMA_MODE_CASCADE, DMA2_MODE_REG);
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outb(0, DMA2_MASK_REG);
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if (alpha_using_srm)
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alpha_mv.device_interrupt = srm_device_interrupt;
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init_i8259a_irqs();
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/* Not interested in the bogus interrupts (0,3,4,5,40-47),
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NMI (1), or HALT (2). */
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if (alpha_using_srm)
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init_srm_irqs(40, 0x3f0000);
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else
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init_pyxis_irqs(0xff00003f0000UL);
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if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL))
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pr_err("Failed to register timer-cascade interrupt\n");
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}
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/*
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* PCI Fixup configuration.
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*
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* Summary @ PYXIS_INT_REQ:
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* Bit Meaning
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* 0 RSVD
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* 1 NMI
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* 2 Halt/Reset switch
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* 3 MBZ
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* 4 RAZ
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* 5 RAZ
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* 6 Interval timer (RTC)
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* 7 PCI-ISA Bridge
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* 8 Interrupt Line A from slot 3
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* 9 Interrupt Line A from slot 2
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*10 Interrupt Line A from slot 1
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*11 Interrupt Line A from slot 0
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*12 Interrupt Line B from slot 3
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*13 Interrupt Line B from slot 2
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*14 Interrupt Line B from slot 1
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*15 Interrupt line B from slot 0
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*16 Interrupt Line C from slot 3
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*17 Interrupt Line C from slot 2
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*18 Interrupt Line C from slot 1
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*19 Interrupt Line C from slot 0
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*20 Interrupt Line D from slot 3
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*21 Interrupt Line D from slot 2
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*22 Interrupt Line D from slot 1
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*23 Interrupt Line D from slot 0
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*
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* IdSel
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* 5 32 bit PCI option slot 2
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* 6 64 bit PCI option slot 0
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* 7 64 bit PCI option slot 1
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* 8 Cypress I/O
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* 9 32 bit PCI option slot 3
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*/
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static int
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sx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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static char irq_tab[5][5] = {
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/*INT INTA INTB INTC INTD */
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{ 16+ 9, 16+ 9, 16+13, 16+17, 16+21}, /* IdSel 5 slot 2 J17 */
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{ 16+11, 16+11, 16+15, 16+19, 16+23}, /* IdSel 6 slot 0 J19 */
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{ 16+10, 16+10, 16+14, 16+18, 16+22}, /* IdSel 7 slot 1 J18 */
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{ -1, -1, -1, -1, -1}, /* IdSel 8 SIO */
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{ 16+ 8, 16+ 8, 16+12, 16+16, 16+20} /* IdSel 9 slot 3 J15 */
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};
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const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5;
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return COMMON_TABLE_LOOKUP;
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}
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static void __init
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sx164_init_pci(void)
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{
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cia_init_pci();
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SMC669_Init(0);
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}
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static void __init
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sx164_init_arch(void)
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{
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/*
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* OSF palcode v1.23 forgets to enable PCA56 Motion Video
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* Instructions. Let's enable it.
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* We have to check palcode revision because CSERVE interface
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* is subject to change without notice. For example, it
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* has been changed completely since v1.16 (found in MILO
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* distribution). -ink
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*/
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struct percpu_struct *cpu = (struct percpu_struct*)
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((char*)hwrpb + hwrpb->processor_offset);
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if (amask(AMASK_MAX) != 0
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&& alpha_using_srm
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&& (cpu->pal_revision & 0xffff) <= 0x117) {
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__asm__ __volatile__(
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"lda $16,8($31)\n"
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"call_pal 9\n" /* Allow PALRES insns in kernel mode */
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".long 0x64000118\n\n" /* hw_mfpr $0,icsr */
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"ldah $16,(1<<(19-16))($31)\n"
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"or $0,$16,$0\n" /* set MVE bit */
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".long 0x74000118\n" /* hw_mtpr $0,icsr */
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"lda $16,9($31)\n"
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"call_pal 9" /* Disable PALRES insns */
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: : : "$0", "$16");
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printk("PCA56 MVI set enabled\n");
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}
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pyxis_init_arch();
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}
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/*
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* The System Vector
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*/
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struct alpha_machine_vector sx164_mv __initmv = {
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.vector_name = "SX164",
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DO_EV5_MMU,
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DO_DEFAULT_RTC,
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DO_PYXIS_IO,
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.machine_check = cia_machine_check,
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.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
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.min_io_address = DEFAULT_IO_BASE,
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.min_mem_address = DEFAULT_MEM_BASE,
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.pci_dac_offset = PYXIS_DAC_OFFSET,
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.nr_irqs = 48,
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.device_interrupt = pyxis_device_interrupt,
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.init_arch = sx164_init_arch,
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.init_irq = sx164_init_irq,
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.init_rtc = common_init_rtc,
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.init_pci = sx164_init_pci,
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.kill_arch = cia_kill_arch,
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.pci_map_irq = sx164_map_irq,
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.pci_swizzle = common_swizzle,
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};
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ALIAS_MV(sx164)
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