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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d666cd0246
This supports SMP Linux running on the BCM3384 Zephyr (BMIPS5000) application processor, with fully functional UART and USB 1.1/2.0. Device Tree is used to configure the following items: - All peripherals - Early console base address - SMP or UP mode - MIPS counter frequency - Memory size / regions - DMA offset - Kernel command line The DT-enabled bootloader and build instructions are posted at https://github.com/Broadcom/aeolus Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8170/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
82 lines
2.3 KiB
C
82 lines
2.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2014 Kevin Cernekee <cernekee@gmail.com>
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*/
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#include <linux/device.h>
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#include <linux/dma-direction.h>
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#include <linux/dma-mapping.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/of.h>
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#include <linux/pci.h>
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#include <linux/types.h>
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#include <dma-coherence.h>
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/*
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* BCM3384 has configurable address translation windows which allow the
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* peripherals' DMA addresses to be different from the Zephyr-visible
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* physical addresses. e.g. usb_dma_addr = zephyr_pa ^ 0x08000000
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*
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* If our DT "memory" node has a "dma-xor-mask" property we will enable this
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* translation using the provided offset.
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*/
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static u32 bcm3384_dma_xor_mask;
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static u32 bcm3384_dma_xor_limit = 0xffffffff;
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/*
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* PCI collapses the memory hole at 0x10000000 - 0x1fffffff.
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* On systems with a dma-xor-mask, this range is guaranteed to live above
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* the dma-xor-limit.
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*/
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#define BCM3384_MEM_HOLE_PA 0x10000000
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#define BCM3384_MEM_HOLE_SIZE 0x10000000
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static dma_addr_t bcm3384_phys_to_dma(struct device *dev, phys_addr_t pa)
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{
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if (dev && dev_is_pci(dev) &&
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pa >= (BCM3384_MEM_HOLE_PA + BCM3384_MEM_HOLE_SIZE))
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return pa - BCM3384_MEM_HOLE_SIZE;
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if (pa <= bcm3384_dma_xor_limit)
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return pa ^ bcm3384_dma_xor_mask;
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return pa;
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}
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dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
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{
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return bcm3384_phys_to_dma(dev, virt_to_phys(addr));
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}
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dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
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{
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return bcm3384_phys_to_dma(dev, page_to_phys(page));
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}
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unsigned long plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
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{
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if (dev && dev_is_pci(dev) &&
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dma_addr >= BCM3384_MEM_HOLE_PA)
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return dma_addr + BCM3384_MEM_HOLE_SIZE;
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if ((dma_addr ^ bcm3384_dma_xor_mask) <= bcm3384_dma_xor_limit)
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return dma_addr ^ bcm3384_dma_xor_mask;
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return dma_addr;
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}
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static int __init bcm3384_init_dma_xor(void)
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{
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struct device_node *np = of_find_node_by_type(NULL, "memory");
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if (!np)
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return 0;
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of_property_read_u32(np, "dma-xor-mask", &bcm3384_dma_xor_mask);
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of_property_read_u32(np, "dma-xor-limit", &bcm3384_dma_xor_limit);
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of_node_put(np);
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return 0;
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}
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arch_initcall(bcm3384_init_dma_xor);
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