Paul Burton 829ca2be9c MIPS: CPC: Use BIT/GENMASK for register fields, order & drop shifts ... Tidy up asm/mips-cpc.h in a similar way to what "MIPS: CM: Use BIT/GENMASK for register fields, order & drop shifts" did for asm/mips-cm.h. We use BIT() & GENMASK() to simplify the definition of register fields, drop the _SHF definitions since that information can be found in the _MSK ones, and then drop the _MSK suffix. Fields definitions are moved to be next to the appropriate register definition, making it easier to link the two & keep everything ordered by register address. Comments are added including the name of each register & a brief description of its purpose which helps to understand what registers are for, link them back to hardware documentation or grep for them. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17003/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2017-08-30 00:57:26 +02:00
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asm	MIPS: CPC: Use BIT/GENMASK for register fields, order & drop shifts	2017-08-30 00:57:26 +02:00
uapi/asm	tty: Fix TIOCGPTPEER ioctl definition	2017-07-17 17:04:41 +02:00