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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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904cd3891d
Add two functions to allocate & free MM table memory. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
105 lines
3.8 KiB
C
105 lines
3.8 KiB
C
/*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Author: Monk.liu@amd.com
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*/
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#ifndef AMDGPU_VIRT_H
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#define AMDGPU_VIRT_H
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#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS (1 << 0) /* vBIOS is sr-iov ready */
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#define AMDGPU_SRIOV_CAPS_ENABLE_IOV (1 << 1) /* sr-iov is enabled on this GPU */
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#define AMDGPU_SRIOV_CAPS_IS_VF (1 << 2) /* this GPU is a virtual function */
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#define AMDGPU_PASSTHROUGH_MODE (1 << 3) /* thw whole GPU is pass through for VM */
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#define AMDGPU_SRIOV_CAPS_RUNTIME (1 << 4) /* is out of full access mode */
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struct amdgpu_mm_table {
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struct amdgpu_bo *bo;
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uint32_t *cpu_addr;
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uint64_t gpu_addr;
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};
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/**
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* struct amdgpu_virt_ops - amdgpu device virt operations
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*/
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struct amdgpu_virt_ops {
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int (*req_full_gpu)(struct amdgpu_device *adev, bool init);
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int (*rel_full_gpu)(struct amdgpu_device *adev, bool init);
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int (*reset_gpu)(struct amdgpu_device *adev);
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};
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/* GPU virtualization */
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struct amdgpu_virt {
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uint32_t caps;
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struct amdgpu_bo *csa_obj;
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uint64_t csa_vmid0_addr;
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bool chained_ib_support;
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uint32_t reg_val_offs;
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struct mutex lock_kiq;
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struct mutex lock_reset;
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struct amdgpu_irq_src ack_irq;
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struct amdgpu_irq_src rcv_irq;
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struct work_struct flr_work;
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struct amdgpu_mm_table mm_table;
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const struct amdgpu_virt_ops *ops;
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};
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#define AMDGPU_CSA_SIZE (8 * 1024)
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#define AMDGPU_CSA_VADDR (AMDGPU_VA_RESERVED_SIZE - AMDGPU_CSA_SIZE)
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#define amdgpu_sriov_enabled(adev) \
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((adev)->virt.caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
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#define amdgpu_sriov_vf(adev) \
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((adev)->virt.caps & AMDGPU_SRIOV_CAPS_IS_VF)
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#define amdgpu_sriov_bios(adev) \
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((adev)->virt.caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
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#define amdgpu_sriov_runtime(adev) \
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((adev)->virt.caps & AMDGPU_SRIOV_CAPS_RUNTIME)
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#define amdgpu_passthrough(adev) \
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((adev)->virt.caps & AMDGPU_PASSTHROUGH_MODE)
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static inline bool is_virtual_machine(void)
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{
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#ifdef CONFIG_X86
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return boot_cpu_has(X86_FEATURE_HYPERVISOR);
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#else
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return false;
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#endif
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}
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struct amdgpu_vm;
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int amdgpu_allocate_static_csa(struct amdgpu_device *adev);
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int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm);
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void amdgpu_virt_init_setting(struct amdgpu_device *adev);
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uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);
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void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
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int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init);
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int amdgpu_virt_release_full_gpu(struct amdgpu_device *adev, bool init);
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int amdgpu_virt_reset_gpu(struct amdgpu_device *adev);
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int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, bool voluntary);
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int amdgpu_virt_alloc_mm_table(struct amdgpu_device *adev);
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void amdgpu_virt_free_mm_table(struct amdgpu_device *adev);
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#endif
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