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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6bd55f0bba
Fix coding style issues reported by checkpatch.pl. Signed-off-by: Michal Simek <monstr@monstr.eu>
81 lines
1.9 KiB
C
81 lines
1.9 KiB
C
/*
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* Support for MicroBlaze PVR (processor version register)
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*
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* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2007 John Williams <john.williams@petalogix.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/compiler.h>
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#include <asm/exceptions.h>
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#include <asm/pvr.h>
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/*
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* Until we get an assembler that knows about the pvr registers,
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* this horrible cruft will have to do.
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* That hardcoded opcode is mfs r3, rpvrNN
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*/
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#define get_single_pvr(pvrid, val) \
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{ \
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register unsigned tmp __asm__("r3"); \
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tmp = 0x0; /* Prevent warning about unused */ \
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__asm__ __volatile__ ( \
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"mfs %0, rpvr" #pvrid ";" \
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: "=r" (tmp) : : "memory"); \
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val = tmp; \
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}
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/*
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* Does the CPU support the PVR register?
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* return value:
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* 0: no PVR
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* 1: simple PVR
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* 2: full PVR
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*
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* This must work on all CPU versions, including those before the
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* PVR was even an option.
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*/
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int cpu_has_pvr(void)
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{
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unsigned long flags;
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unsigned pvr0;
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local_save_flags(flags);
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/* PVR bit in MSR tells us if there is any support */
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if (!(flags & PVR_MSR_BIT))
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return 0;
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get_single_pvr(0, pvr0);
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pr_debug("%s: pvr0 is 0x%08x\n", __func__, pvr0);
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if (pvr0 & PVR0_PVR_FULL_MASK)
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return 1;
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/* for partial PVR use static cpuinfo */
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return 2;
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}
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void get_pvr(struct pvr_s *p)
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{
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get_single_pvr(0, p->pvr[0]);
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get_single_pvr(1, p->pvr[1]);
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get_single_pvr(2, p->pvr[2]);
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get_single_pvr(3, p->pvr[3]);
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get_single_pvr(4, p->pvr[4]);
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get_single_pvr(5, p->pvr[5]);
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get_single_pvr(6, p->pvr[6]);
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get_single_pvr(7, p->pvr[7]);
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get_single_pvr(8, p->pvr[8]);
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get_single_pvr(9, p->pvr[9]);
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get_single_pvr(10, p->pvr[10]);
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get_single_pvr(11, p->pvr[11]);
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}
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