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34e36c1541
This MSI driver can be used on 83xx/85xx/86xx board. In this driver, virtual interrupt host and chip were setup. There are 256 MSI interrupts in this host, Every 32 MSI interrupts cascaded to one IPIC/MPIC interrupt. The chip was treated as edge sensitive and some necessary functions were setup for this chip. Before using the MSI interrupt, PCI/PCIE device need to ask for a MSI interrupt in the 256 MSI interrupts. A 256bit bitmap show which MSI interrupt was used, reserve bit in the bitmap can be used to force the device use some designate MSI interrupt in the 256 MSI interrupts. Sometimes this is useful for testing the all the MSI interrupts. The msi-available-ranges property in the dts file was used for this purpose. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
43 lines
984 B
C
43 lines
984 B
C
/*
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* Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Tony Li <tony.li@freescale.com>
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* Jason Jin <Jason.jin@freescale.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2 of the
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* License.
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*
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*/
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#ifndef _POWERPC_SYSDEV_FSL_MSI_H
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#define _POWERPC_SYSDEV_FSL_MSI_H
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#define NR_MSI_REG 8
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#define IRQS_PER_MSI_REG 32
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#define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG)
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#define FSL_PIC_IP_MASK 0x0000000F
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#define FSL_PIC_IP_MPIC 0x00000001
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#define FSL_PIC_IP_IPIC 0x00000002
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struct fsl_msi {
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/* Device node of the MSI interrupt*/
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struct device_node *of_node;
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struct irq_host *irqhost;
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unsigned long cascade_irq;
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u32 msi_addr_lo;
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u32 msi_addr_hi;
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void __iomem *msi_regs;
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u32 feature;
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unsigned long *fsl_msi_bitmap;
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spinlock_t bitmap_lock;
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};
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#endif /* _POWERPC_SYSDEV_FSL_MSI_H */
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