mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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cb42705792
These inline functions improve code readability by enabling callers to read specific fields from the header without knowledge of byte offsets. Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Don Hiatt <don.hiatt@intel.com> Signed-off-by: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
219 lines
6.8 KiB
C
219 lines
6.8 KiB
C
/*
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* Copyright(c) 2015, 2016 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#define CREATE_TRACE_POINTS
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#include "trace.h"
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u8 ibhdr_exhdr_len(struct ib_header *hdr)
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{
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struct ib_other_headers *ohdr;
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u8 opcode;
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if (ib_get_lnh(hdr) == HFI1_LRH_BTH)
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ohdr = &hdr->u.oth;
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else
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ohdr = &hdr->u.l.oth;
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opcode = ib_bth_get_opcode(ohdr);
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return hdr_len_by_opcode[opcode] == 0 ?
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0 : hdr_len_by_opcode[opcode] - (12 + 8);
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}
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#define IMM_PRN "imm %d"
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#define RETH_PRN "reth vaddr 0x%.16llx rkey 0x%.8x dlen 0x%.8x"
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#define AETH_PRN "aeth syn 0x%.2x %s msn 0x%.8x"
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#define DETH_PRN "deth qkey 0x%.8x sqpn 0x%.6x"
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#define IETH_PRN "ieth rkey 0x%.8x"
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#define ATOMICACKETH_PRN "origdata %llx"
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#define ATOMICETH_PRN "vaddr 0x%llx rkey 0x%.8x sdata %llx cdata %llx"
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#define OP(transport, op) IB_OPCODE_## transport ## _ ## op
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static const char *parse_syndrome(u8 syndrome)
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{
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switch (syndrome >> 5) {
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case 0:
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return "ACK";
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case 1:
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return "RNRNAK";
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case 3:
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return "NAK";
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}
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return "";
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}
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const char *parse_everbs_hdrs(
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struct trace_seq *p,
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u8 opcode,
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void *ehdrs)
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{
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union ib_ehdrs *eh = ehdrs;
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const char *ret = trace_seq_buffer_ptr(p);
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switch (opcode) {
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/* imm */
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case OP(RC, SEND_LAST_WITH_IMMEDIATE):
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case OP(UC, SEND_LAST_WITH_IMMEDIATE):
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case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
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case OP(UC, SEND_ONLY_WITH_IMMEDIATE):
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case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
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case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
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trace_seq_printf(p, IMM_PRN,
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be32_to_cpu(eh->imm_data));
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break;
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/* reth + imm */
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case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
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case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
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trace_seq_printf(p, RETH_PRN " " IMM_PRN,
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get_ib_reth_vaddr(&eh->rc.reth),
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be32_to_cpu(eh->rc.reth.rkey),
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be32_to_cpu(eh->rc.reth.length),
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be32_to_cpu(eh->rc.imm_data));
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break;
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/* reth */
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case OP(RC, RDMA_READ_REQUEST):
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case OP(RC, RDMA_WRITE_FIRST):
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case OP(UC, RDMA_WRITE_FIRST):
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case OP(RC, RDMA_WRITE_ONLY):
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case OP(UC, RDMA_WRITE_ONLY):
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trace_seq_printf(p, RETH_PRN,
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get_ib_reth_vaddr(&eh->rc.reth),
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be32_to_cpu(eh->rc.reth.rkey),
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be32_to_cpu(eh->rc.reth.length));
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break;
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case OP(RC, RDMA_READ_RESPONSE_FIRST):
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case OP(RC, RDMA_READ_RESPONSE_LAST):
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case OP(RC, RDMA_READ_RESPONSE_ONLY):
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case OP(RC, ACKNOWLEDGE):
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trace_seq_printf(p, AETH_PRN, be32_to_cpu(eh->aeth) >> 24,
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parse_syndrome(be32_to_cpu(eh->aeth) >> 24),
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be32_to_cpu(eh->aeth) & IB_MSN_MASK);
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break;
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/* aeth + atomicacketh */
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case OP(RC, ATOMIC_ACKNOWLEDGE):
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trace_seq_printf(p, AETH_PRN " " ATOMICACKETH_PRN,
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be32_to_cpu(eh->at.aeth) >> 24,
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parse_syndrome(be32_to_cpu(eh->at.aeth) >> 24),
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be32_to_cpu(eh->at.aeth) & IB_MSN_MASK,
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ib_u64_get(&eh->at.atomic_ack_eth));
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break;
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/* atomiceth */
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case OP(RC, COMPARE_SWAP):
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case OP(RC, FETCH_ADD):
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trace_seq_printf(p, ATOMICETH_PRN,
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get_ib_ateth_vaddr(&eh->atomic_eth),
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eh->atomic_eth.rkey,
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get_ib_ateth_swap(&eh->atomic_eth),
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get_ib_ateth_compare(&eh->atomic_eth));
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break;
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/* deth */
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case OP(UD, SEND_ONLY):
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case OP(UD, SEND_ONLY_WITH_IMMEDIATE):
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trace_seq_printf(p, DETH_PRN,
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be32_to_cpu(eh->ud.deth[0]),
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be32_to_cpu(eh->ud.deth[1]) & RVT_QPN_MASK);
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break;
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/* ieth */
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case OP(RC, SEND_LAST_WITH_INVALIDATE):
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case OP(RC, SEND_ONLY_WITH_INVALIDATE):
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trace_seq_printf(p, IETH_PRN,
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be32_to_cpu(eh->ieth));
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break;
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}
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trace_seq_putc(p, 0);
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return ret;
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}
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const char *parse_sdma_flags(
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struct trace_seq *p,
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u64 desc0, u64 desc1)
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{
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const char *ret = trace_seq_buffer_ptr(p);
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char flags[5] = { 'x', 'x', 'x', 'x', 0 };
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flags[0] = (desc1 & SDMA_DESC1_INT_REQ_FLAG) ? 'I' : '-';
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flags[1] = (desc1 & SDMA_DESC1_HEAD_TO_HOST_FLAG) ? 'H' : '-';
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flags[2] = (desc0 & SDMA_DESC0_FIRST_DESC_FLAG) ? 'F' : '-';
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flags[3] = (desc0 & SDMA_DESC0_LAST_DESC_FLAG) ? 'L' : '-';
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trace_seq_printf(p, "%s", flags);
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if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
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trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
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(u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT) &
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SDMA_DESC1_HEADER_MODE_MASK),
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(u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT) &
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SDMA_DESC1_HEADER_INDEX_MASK),
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(u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT) &
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SDMA_DESC1_HEADER_DWS_MASK));
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return ret;
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}
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const char *print_u32_array(
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struct trace_seq *p,
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u32 *arr, int len)
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{
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int i;
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const char *ret = trace_seq_buffer_ptr(p);
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for (i = 0; i < len ; i++)
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trace_seq_printf(p, "%s%#x", i == 0 ? "" : " ", arr[i]);
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trace_seq_putc(p, 0);
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return ret;
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}
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__hfi1_trace_fn(PKT);
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__hfi1_trace_fn(PROC);
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__hfi1_trace_fn(SDMA);
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__hfi1_trace_fn(LINKVERB);
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__hfi1_trace_fn(DEBUG);
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__hfi1_trace_fn(SNOOP);
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__hfi1_trace_fn(CNTR);
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__hfi1_trace_fn(PIO);
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__hfi1_trace_fn(DC8051);
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__hfi1_trace_fn(FIRMWARE);
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__hfi1_trace_fn(RCVCTRL);
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__hfi1_trace_fn(TID);
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__hfi1_trace_fn(MMU);
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__hfi1_trace_fn(IOCTL);
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