mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 22:56:45 +07:00
d44fa156dc
We can configure voltage controller for cpcap with the data available in Motorola Mapphone Android Linux kernel. Let's add it so we can have droid4 behave the same way for voltage controller as other omap4 devices and save some power when idle. Note that we're now using high-speed i2c mode, looks like the Motorola kernel had a typo using 0x200 instead of 200 for the timings which may caused it to not work properly. Also note that in the long run, this should just become dts data for a voltage controller device driver. But let's get things working first to make it possible to test further changes easily. Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Tony Lindgren <tony@atomide.com>
169 lines
4.3 KiB
C
169 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* OMAP2/3 Power Management Routines
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*
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* Copyright (C) 2008 Nokia Corporation
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* Jouni Hogander
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
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#define __ARCH_ARM_MACH_OMAP2_PM_H
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#include <linux/err.h>
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#include "powerdomain.h"
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#ifdef CONFIG_CPU_IDLE
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extern int __init omap3_idle_init(void);
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extern int __init omap4_idle_init(void);
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#else
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static inline int omap3_idle_init(void)
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{
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return 0;
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}
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static inline int omap4_idle_init(void)
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{
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return 0;
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}
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#endif
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extern void *omap3_secure_ram_storage;
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extern void omap3_pm_off_mode_enable(int);
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extern void omap_sram_idle(void);
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extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
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#if defined(CONFIG_PM_OPP)
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extern int omap3_opp_init(void);
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extern int omap4_opp_init(void);
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#else
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static inline int omap3_opp_init(void)
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{
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return -EINVAL;
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}
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static inline int omap4_opp_init(void)
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{
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return -EINVAL;
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}
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#endif
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extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
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extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
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#ifdef CONFIG_PM_DEBUG
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extern u32 enable_off_mode;
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#else
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#define enable_off_mode 0
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#endif
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#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
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extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
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#else
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#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
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#endif /* CONFIG_PM_DEBUG */
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/* 24xx */
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extern void omap24xx_idle_loop_suspend(void);
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extern unsigned int omap24xx_idle_loop_suspend_sz;
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extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
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void __iomem *sdrc_power);
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extern unsigned int omap24xx_cpu_suspend_sz;
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/* 3xxx */
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extern void omap34xx_cpu_suspend(int save_state);
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/* omap3_do_wfi function pointer and size, for copy to SRAM */
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extern void omap3_do_wfi(void);
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extern unsigned int omap3_do_wfi_sz;
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/* ... and its pointer from SRAM after copy */
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extern void (*omap3_do_wfi_sram)(void);
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extern struct am33xx_pm_sram_addr am33xx_pm_sram;
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extern struct am33xx_pm_sram_addr am43xx_pm_sram;
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extern void omap3_save_scratchpad_contents(void);
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#define PM_RTA_ERRATUM_i608 (1 << 0)
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#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
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#define PM_PER_MEMORIES_ERRATUM_i582 (1 << 2)
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#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
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extern u16 pm34xx_errata;
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#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
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extern void enable_omap3630_toggle_l2_on_restore(void);
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#else
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#define IS_PM34XX_ERRATUM(id) 0
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static inline void enable_omap3630_toggle_l2_on_restore(void) { }
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#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
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#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0)
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#define PM_OMAP4_CPU_OSWR_DISABLE (1 << 1)
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#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
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defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
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extern u16 pm44xx_errata;
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#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id))
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#else
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#define IS_PM44XX_ERRATUM(id) 0
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#endif
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#define OMAP4_VP_CONFIG_ERROROFFSET 0x00
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#define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01
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#define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04
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#define OMAP4_VP_VLIMITTO_TIMEOUT_US 200
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#ifdef CONFIG_POWER_AVS_OMAP
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extern int omap_devinit_smartreflex(void);
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extern void omap_enable_smartreflex_on_init(void);
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#else
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static inline int omap_devinit_smartreflex(void)
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{
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return -EINVAL;
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}
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static inline void omap_enable_smartreflex_on_init(void) {}
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#endif
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#ifdef CONFIG_TWL4030_CORE
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extern int omap3_twl_init(void);
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extern int omap4_twl_init(void);
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extern int omap3_twl_set_sr_bit(bool enable);
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#else
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static inline int omap3_twl_init(void)
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{
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return -EINVAL;
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}
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static inline int omap4_twl_init(void)
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{
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return -EINVAL;
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}
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#endif
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#if IS_ENABLED(CONFIG_MFD_CPCAP)
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extern int omap4_cpcap_init(void);
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#else
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static inline int omap4_cpcap_init(void)
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{
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return -EINVAL;
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}
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#endif
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#ifdef CONFIG_PM
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extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
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extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
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extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
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#else
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static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
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static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
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static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
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#endif
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#ifdef CONFIG_SUSPEND
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void omap_common_suspend_init(void *pm_suspend);
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#else
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static inline void omap_common_suspend_init(void *pm_suspend)
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{
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}
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#endif /* CONFIG_SUSPEND */
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#endif
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