mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7cd4ce2e46
Handle compiling with -mbig-endian on aarch64, which generates binaries with mixed code vs data endianness (little endian code, big endian data). Else mismatch between code endianness for the generated signatures and data endianness for the RSEQ_SIG parameter passed to the rseq registration will trigger application segmentation faults when the kernel try to abort rseq critical sections. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Acked-by: Will Deacon <will.deacon@arm.com> CC: Peter Zijlstra <peterz@infradead.org> CC: Thomas Gleixner <tglx@linutronix.de> CC: Joel Fernandes <joelaf@google.com> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Dave Watson <davejwatson@fb.com> CC: Will Deacon <will.deacon@arm.com> CC: Shuah Khan <shuah@kernel.org> CC: Andi Kleen <andi@firstfloor.org> CC: linux-kselftest@vger.kernel.org CC: "H . Peter Anvin" <hpa@zytor.com> CC: Chris Lameter <cl@linux.com> CC: Russell King <linux@arm.linux.org.uk> CC: Michael Kerrisk <mtk.manpages@gmail.com> CC: "Paul E . McKenney" <paulmck@linux.vnet.ibm.com> CC: Paul Turner <pjt@google.com> CC: Boqun Feng <boqun.feng@gmail.com> CC: Josh Triplett <josh@joshtriplett.org> CC: Steven Rostedt <rostedt@goodmis.org> CC: Ben Maurer <bmaurer@fb.com> CC: linux-api@vger.kernel.org CC: Andy Lutomirski <luto@amacapital.net> CC: Andrew Morton <akpm@linux-foundation.org> CC: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
663 lines
18 KiB
C
663 lines
18 KiB
C
/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* rseq-arm64.h
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*
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* (C) Copyright 2016-2018 - Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
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* (C) Copyright 2018 - Will Deacon <will.deacon@arm.com>
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*/
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/*
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* aarch64 -mbig-endian generates mixed endianness code vs data:
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* little-endian code and big-endian data. Ensure the RSEQ_SIG signature
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* matches code endianness.
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*/
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#define RSEQ_SIG_CODE 0xd428bc00 /* BRK #0x45E0. */
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#ifdef __AARCH64EB__
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#define RSEQ_SIG_DATA 0x00bc28d4 /* BRK #0x45E0. */
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#else
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#define RSEQ_SIG_DATA RSEQ_SIG_CODE
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#endif
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#define RSEQ_SIG RSEQ_SIG_DATA
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#define rseq_smp_mb() __asm__ __volatile__ ("dmb ish" ::: "memory")
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#define rseq_smp_rmb() __asm__ __volatile__ ("dmb ishld" ::: "memory")
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#define rseq_smp_wmb() __asm__ __volatile__ ("dmb ishst" ::: "memory")
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#define rseq_smp_load_acquire(p) \
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__extension__ ({ \
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__typeof(*p) ____p1; \
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("ldarb %w0, %1" \
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: "=r" (*(__u8 *)p) \
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: "Q" (*p) : "memory"); \
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break; \
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case 2: \
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asm volatile ("ldarh %w0, %1" \
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: "=r" (*(__u16 *)p) \
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: "Q" (*p) : "memory"); \
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break; \
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case 4: \
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asm volatile ("ldar %w0, %1" \
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: "=r" (*(__u32 *)p) \
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: "Q" (*p) : "memory"); \
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break; \
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case 8: \
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asm volatile ("ldar %0, %1" \
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: "=r" (*(__u64 *)p) \
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: "Q" (*p) : "memory"); \
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break; \
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} \
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____p1; \
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})
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#define rseq_smp_acquire__after_ctrl_dep() rseq_smp_rmb()
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#define rseq_smp_store_release(p, v) \
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do { \
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("stlrb %w1, %0" \
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: "=Q" (*p) \
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: "r" ((__u8)v) \
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: "memory"); \
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break; \
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case 2: \
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asm volatile ("stlrh %w1, %0" \
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: "=Q" (*p) \
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: "r" ((__u16)v) \
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: "memory"); \
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break; \
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case 4: \
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asm volatile ("stlr %w1, %0" \
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: "=Q" (*p) \
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: "r" ((__u32)v) \
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: "memory"); \
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break; \
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case 8: \
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asm volatile ("stlr %1, %0" \
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: "=Q" (*p) \
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: "r" ((__u64)v) \
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: "memory"); \
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break; \
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} \
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} while (0)
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#ifdef RSEQ_SKIP_FASTPATH
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#include "rseq-skip.h"
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#else /* !RSEQ_SKIP_FASTPATH */
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#define RSEQ_ASM_TMP_REG32 "w15"
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#define RSEQ_ASM_TMP_REG "x15"
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#define RSEQ_ASM_TMP_REG_2 "x14"
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#define __RSEQ_ASM_DEFINE_TABLE(label, version, flags, start_ip, \
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post_commit_offset, abort_ip) \
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" .pushsection __rseq_cs, \"aw\"\n" \
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" .balign 32\n" \
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__rseq_str(label) ":\n" \
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" .long " __rseq_str(version) ", " __rseq_str(flags) "\n" \
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" .quad " __rseq_str(start_ip) ", " \
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__rseq_str(post_commit_offset) ", " \
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__rseq_str(abort_ip) "\n" \
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" .popsection\n\t" \
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" .pushsection __rseq_cs_ptr_array, \"aw\"\n" \
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" .quad " __rseq_str(label) "b\n" \
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" .popsection\n"
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#define RSEQ_ASM_DEFINE_TABLE(label, start_ip, post_commit_ip, abort_ip) \
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__RSEQ_ASM_DEFINE_TABLE(label, 0x0, 0x0, start_ip, \
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(post_commit_ip - start_ip), abort_ip)
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/*
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* Exit points of a rseq critical section consist of all instructions outside
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* of the critical section where a critical section can either branch to or
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* reach through the normal course of its execution. The abort IP and the
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* post-commit IP are already part of the __rseq_cs section and should not be
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* explicitly defined as additional exit points. Knowing all exit points is
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* useful to assist debuggers stepping over the critical section.
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*/
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#define RSEQ_ASM_DEFINE_EXIT_POINT(start_ip, exit_ip) \
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" .pushsection __rseq_exit_point_array, \"aw\"\n" \
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" .quad " __rseq_str(start_ip) ", " __rseq_str(exit_ip) "\n" \
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" .popsection\n"
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#define RSEQ_ASM_STORE_RSEQ_CS(label, cs_label, rseq_cs) \
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RSEQ_INJECT_ASM(1) \
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" adrp " RSEQ_ASM_TMP_REG ", " __rseq_str(cs_label) "\n" \
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" add " RSEQ_ASM_TMP_REG ", " RSEQ_ASM_TMP_REG \
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", :lo12:" __rseq_str(cs_label) "\n" \
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" str " RSEQ_ASM_TMP_REG ", %[" __rseq_str(rseq_cs) "]\n" \
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__rseq_str(label) ":\n"
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#define RSEQ_ASM_DEFINE_ABORT(label, abort_label) \
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" b 222f\n" \
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" .inst " __rseq_str(RSEQ_SIG_CODE) "\n" \
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__rseq_str(label) ":\n" \
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" b %l[" __rseq_str(abort_label) "]\n" \
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"222:\n"
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#define RSEQ_ASM_OP_STORE(value, var) \
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" str %[" __rseq_str(value) "], %[" __rseq_str(var) "]\n"
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#define RSEQ_ASM_OP_STORE_RELEASE(value, var) \
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" stlr %[" __rseq_str(value) "], %[" __rseq_str(var) "]\n"
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#define RSEQ_ASM_OP_FINAL_STORE(value, var, post_commit_label) \
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RSEQ_ASM_OP_STORE(value, var) \
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__rseq_str(post_commit_label) ":\n"
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#define RSEQ_ASM_OP_FINAL_STORE_RELEASE(value, var, post_commit_label) \
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RSEQ_ASM_OP_STORE_RELEASE(value, var) \
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__rseq_str(post_commit_label) ":\n"
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#define RSEQ_ASM_OP_CMPEQ(var, expect, label) \
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" ldr " RSEQ_ASM_TMP_REG ", %[" __rseq_str(var) "]\n" \
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" sub " RSEQ_ASM_TMP_REG ", " RSEQ_ASM_TMP_REG \
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", %[" __rseq_str(expect) "]\n" \
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" cbnz " RSEQ_ASM_TMP_REG ", " __rseq_str(label) "\n"
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#define RSEQ_ASM_OP_CMPEQ32(var, expect, label) \
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" ldr " RSEQ_ASM_TMP_REG32 ", %[" __rseq_str(var) "]\n" \
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" sub " RSEQ_ASM_TMP_REG32 ", " RSEQ_ASM_TMP_REG32 \
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", %w[" __rseq_str(expect) "]\n" \
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" cbnz " RSEQ_ASM_TMP_REG32 ", " __rseq_str(label) "\n"
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#define RSEQ_ASM_OP_CMPNE(var, expect, label) \
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" ldr " RSEQ_ASM_TMP_REG ", %[" __rseq_str(var) "]\n" \
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" sub " RSEQ_ASM_TMP_REG ", " RSEQ_ASM_TMP_REG \
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", %[" __rseq_str(expect) "]\n" \
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" cbz " RSEQ_ASM_TMP_REG ", " __rseq_str(label) "\n"
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#define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \
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RSEQ_INJECT_ASM(2) \
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RSEQ_ASM_OP_CMPEQ32(current_cpu_id, cpu_id, label)
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#define RSEQ_ASM_OP_R_LOAD(var) \
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" ldr " RSEQ_ASM_TMP_REG ", %[" __rseq_str(var) "]\n"
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#define RSEQ_ASM_OP_R_STORE(var) \
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" str " RSEQ_ASM_TMP_REG ", %[" __rseq_str(var) "]\n"
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#define RSEQ_ASM_OP_R_LOAD_OFF(offset) \
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" ldr " RSEQ_ASM_TMP_REG ", [" RSEQ_ASM_TMP_REG \
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", %[" __rseq_str(offset) "]]\n"
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#define RSEQ_ASM_OP_R_ADD(count) \
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" add " RSEQ_ASM_TMP_REG ", " RSEQ_ASM_TMP_REG \
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", %[" __rseq_str(count) "]\n"
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#define RSEQ_ASM_OP_R_FINAL_STORE(var, post_commit_label) \
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" str " RSEQ_ASM_TMP_REG ", %[" __rseq_str(var) "]\n" \
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__rseq_str(post_commit_label) ":\n"
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#define RSEQ_ASM_OP_R_BAD_MEMCPY(dst, src, len) \
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" cbz %[" __rseq_str(len) "], 333f\n" \
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" mov " RSEQ_ASM_TMP_REG_2 ", %[" __rseq_str(len) "]\n" \
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"222: sub " RSEQ_ASM_TMP_REG_2 ", " RSEQ_ASM_TMP_REG_2 ", #1\n" \
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" ldrb " RSEQ_ASM_TMP_REG32 ", [%[" __rseq_str(src) "]" \
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", " RSEQ_ASM_TMP_REG_2 "]\n" \
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" strb " RSEQ_ASM_TMP_REG32 ", [%[" __rseq_str(dst) "]" \
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", " RSEQ_ASM_TMP_REG_2 "]\n" \
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" cbnz " RSEQ_ASM_TMP_REG_2 ", 222b\n" \
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"333:\n"
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static inline __attribute__((always_inline))
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int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu)
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{
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RSEQ_INJECT_C(9)
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__asm__ __volatile__ goto (
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RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f)
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[cmpfail])
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#ifdef RSEQ_COMPARE_TWICE
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1])
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error2])
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#endif
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RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs)
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RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
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RSEQ_INJECT_ASM(3)
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RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail])
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RSEQ_INJECT_ASM(4)
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#ifdef RSEQ_COMPARE_TWICE
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RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
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RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2])
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#endif
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RSEQ_ASM_OP_FINAL_STORE(newv, v, 3)
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RSEQ_INJECT_ASM(5)
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RSEQ_ASM_DEFINE_ABORT(4, abort)
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: /* gcc asm goto does not allow outputs */
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: [cpu_id] "r" (cpu),
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[current_cpu_id] "Qo" (__rseq_abi.cpu_id),
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[rseq_cs] "m" (__rseq_abi.rseq_cs),
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[v] "Qo" (*v),
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[expect] "r" (expect),
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[newv] "r" (newv)
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RSEQ_INJECT_INPUT
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: "memory", RSEQ_ASM_TMP_REG
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: abort, cmpfail
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#ifdef RSEQ_COMPARE_TWICE
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, error1, error2
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#endif
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);
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return 0;
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abort:
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RSEQ_INJECT_FAILED
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return -1;
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cmpfail:
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return 1;
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#ifdef RSEQ_COMPARE_TWICE
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error1:
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rseq_bug("cpu_id comparison failed");
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error2:
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rseq_bug("expected value comparison failed");
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#endif
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}
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static inline __attribute__((always_inline))
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int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot,
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off_t voffp, intptr_t *load, int cpu)
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{
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RSEQ_INJECT_C(9)
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__asm__ __volatile__ goto (
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RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f)
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[cmpfail])
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#ifdef RSEQ_COMPARE_TWICE
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1])
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error2])
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#endif
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RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs)
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RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
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RSEQ_INJECT_ASM(3)
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RSEQ_ASM_OP_CMPNE(v, expectnot, %l[cmpfail])
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RSEQ_INJECT_ASM(4)
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#ifdef RSEQ_COMPARE_TWICE
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RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
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RSEQ_ASM_OP_CMPNE(v, expectnot, %l[error2])
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#endif
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RSEQ_ASM_OP_R_LOAD(v)
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RSEQ_ASM_OP_R_STORE(load)
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RSEQ_ASM_OP_R_LOAD_OFF(voffp)
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RSEQ_ASM_OP_R_FINAL_STORE(v, 3)
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RSEQ_INJECT_ASM(5)
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RSEQ_ASM_DEFINE_ABORT(4, abort)
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: /* gcc asm goto does not allow outputs */
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: [cpu_id] "r" (cpu),
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[current_cpu_id] "Qo" (__rseq_abi.cpu_id),
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[rseq_cs] "m" (__rseq_abi.rseq_cs),
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[v] "Qo" (*v),
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[expectnot] "r" (expectnot),
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[load] "Qo" (*load),
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[voffp] "r" (voffp)
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RSEQ_INJECT_INPUT
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: "memory", RSEQ_ASM_TMP_REG
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: abort, cmpfail
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#ifdef RSEQ_COMPARE_TWICE
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, error1, error2
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#endif
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);
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return 0;
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abort:
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RSEQ_INJECT_FAILED
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return -1;
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cmpfail:
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return 1;
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#ifdef RSEQ_COMPARE_TWICE
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error1:
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rseq_bug("cpu_id comparison failed");
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error2:
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rseq_bug("expected value comparison failed");
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#endif
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}
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static inline __attribute__((always_inline))
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int rseq_addv(intptr_t *v, intptr_t count, int cpu)
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{
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RSEQ_INJECT_C(9)
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__asm__ __volatile__ goto (
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RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f)
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#ifdef RSEQ_COMPARE_TWICE
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1])
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#endif
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RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs)
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RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
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RSEQ_INJECT_ASM(3)
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#ifdef RSEQ_COMPARE_TWICE
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RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
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#endif
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RSEQ_ASM_OP_R_LOAD(v)
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RSEQ_ASM_OP_R_ADD(count)
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RSEQ_ASM_OP_R_FINAL_STORE(v, 3)
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RSEQ_INJECT_ASM(4)
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RSEQ_ASM_DEFINE_ABORT(4, abort)
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: /* gcc asm goto does not allow outputs */
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: [cpu_id] "r" (cpu),
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[current_cpu_id] "Qo" (__rseq_abi.cpu_id),
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[rseq_cs] "m" (__rseq_abi.rseq_cs),
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[v] "Qo" (*v),
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[count] "r" (count)
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RSEQ_INJECT_INPUT
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: "memory", RSEQ_ASM_TMP_REG
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: abort
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#ifdef RSEQ_COMPARE_TWICE
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, error1
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#endif
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);
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return 0;
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abort:
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RSEQ_INJECT_FAILED
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return -1;
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#ifdef RSEQ_COMPARE_TWICE
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error1:
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rseq_bug("cpu_id comparison failed");
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#endif
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}
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static inline __attribute__((always_inline))
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int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect,
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intptr_t *v2, intptr_t newv2,
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intptr_t newv, int cpu)
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{
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RSEQ_INJECT_C(9)
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__asm__ __volatile__ goto (
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RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f)
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[cmpfail])
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#ifdef RSEQ_COMPARE_TWICE
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1])
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RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error2])
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#endif
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RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs)
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RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
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RSEQ_INJECT_ASM(3)
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RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail])
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RSEQ_INJECT_ASM(4)
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#ifdef RSEQ_COMPARE_TWICE
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RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
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RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2])
|
|
#endif
|
|
RSEQ_ASM_OP_STORE(newv2, v2)
|
|
RSEQ_INJECT_ASM(5)
|
|
RSEQ_ASM_OP_FINAL_STORE(newv, v, 3)
|
|
RSEQ_INJECT_ASM(6)
|
|
RSEQ_ASM_DEFINE_ABORT(4, abort)
|
|
: /* gcc asm goto does not allow outputs */
|
|
: [cpu_id] "r" (cpu),
|
|
[current_cpu_id] "Qo" (__rseq_abi.cpu_id),
|
|
[rseq_cs] "m" (__rseq_abi.rseq_cs),
|
|
[expect] "r" (expect),
|
|
[v] "Qo" (*v),
|
|
[newv] "r" (newv),
|
|
[v2] "Qo" (*v2),
|
|
[newv2] "r" (newv2)
|
|
RSEQ_INJECT_INPUT
|
|
: "memory", RSEQ_ASM_TMP_REG
|
|
: abort, cmpfail
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
, error1, error2
|
|
#endif
|
|
);
|
|
|
|
return 0;
|
|
abort:
|
|
RSEQ_INJECT_FAILED
|
|
return -1;
|
|
cmpfail:
|
|
return 1;
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
error1:
|
|
rseq_bug("cpu_id comparison failed");
|
|
error2:
|
|
rseq_bug("expected value comparison failed");
|
|
#endif
|
|
}
|
|
|
|
static inline __attribute__((always_inline))
|
|
int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect,
|
|
intptr_t *v2, intptr_t newv2,
|
|
intptr_t newv, int cpu)
|
|
{
|
|
RSEQ_INJECT_C(9)
|
|
|
|
__asm__ __volatile__ goto (
|
|
RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f)
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[cmpfail])
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1])
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error2])
|
|
#endif
|
|
RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs)
|
|
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
|
|
RSEQ_INJECT_ASM(3)
|
|
RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail])
|
|
RSEQ_INJECT_ASM(4)
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
|
|
RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2])
|
|
#endif
|
|
RSEQ_ASM_OP_STORE(newv2, v2)
|
|
RSEQ_INJECT_ASM(5)
|
|
RSEQ_ASM_OP_FINAL_STORE_RELEASE(newv, v, 3)
|
|
RSEQ_INJECT_ASM(6)
|
|
RSEQ_ASM_DEFINE_ABORT(4, abort)
|
|
: /* gcc asm goto does not allow outputs */
|
|
: [cpu_id] "r" (cpu),
|
|
[current_cpu_id] "Qo" (__rseq_abi.cpu_id),
|
|
[rseq_cs] "m" (__rseq_abi.rseq_cs),
|
|
[expect] "r" (expect),
|
|
[v] "Qo" (*v),
|
|
[newv] "r" (newv),
|
|
[v2] "Qo" (*v2),
|
|
[newv2] "r" (newv2)
|
|
RSEQ_INJECT_INPUT
|
|
: "memory", RSEQ_ASM_TMP_REG
|
|
: abort, cmpfail
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
, error1, error2
|
|
#endif
|
|
);
|
|
|
|
return 0;
|
|
abort:
|
|
RSEQ_INJECT_FAILED
|
|
return -1;
|
|
cmpfail:
|
|
return 1;
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
error1:
|
|
rseq_bug("cpu_id comparison failed");
|
|
error2:
|
|
rseq_bug("expected value comparison failed");
|
|
#endif
|
|
}
|
|
|
|
static inline __attribute__((always_inline))
|
|
int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect,
|
|
intptr_t *v2, intptr_t expect2,
|
|
intptr_t newv, int cpu)
|
|
{
|
|
RSEQ_INJECT_C(9)
|
|
|
|
__asm__ __volatile__ goto (
|
|
RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f)
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[cmpfail])
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1])
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error2])
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error3])
|
|
#endif
|
|
RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs)
|
|
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
|
|
RSEQ_INJECT_ASM(3)
|
|
RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail])
|
|
RSEQ_INJECT_ASM(4)
|
|
RSEQ_ASM_OP_CMPEQ(v2, expect2, %l[cmpfail])
|
|
RSEQ_INJECT_ASM(5)
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
|
|
RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2])
|
|
RSEQ_ASM_OP_CMPEQ(v2, expect2, %l[error3])
|
|
#endif
|
|
RSEQ_ASM_OP_FINAL_STORE(newv, v, 3)
|
|
RSEQ_INJECT_ASM(6)
|
|
RSEQ_ASM_DEFINE_ABORT(4, abort)
|
|
: /* gcc asm goto does not allow outputs */
|
|
: [cpu_id] "r" (cpu),
|
|
[current_cpu_id] "Qo" (__rseq_abi.cpu_id),
|
|
[rseq_cs] "m" (__rseq_abi.rseq_cs),
|
|
[v] "Qo" (*v),
|
|
[expect] "r" (expect),
|
|
[v2] "Qo" (*v2),
|
|
[expect2] "r" (expect2),
|
|
[newv] "r" (newv)
|
|
RSEQ_INJECT_INPUT
|
|
: "memory", RSEQ_ASM_TMP_REG
|
|
: abort, cmpfail
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
, error1, error2, error3
|
|
#endif
|
|
);
|
|
|
|
return 0;
|
|
abort:
|
|
RSEQ_INJECT_FAILED
|
|
return -1;
|
|
cmpfail:
|
|
return 1;
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
error1:
|
|
rseq_bug("cpu_id comparison failed");
|
|
error2:
|
|
rseq_bug("expected value comparison failed");
|
|
error3:
|
|
rseq_bug("2nd expected value comparison failed");
|
|
#endif
|
|
}
|
|
|
|
static inline __attribute__((always_inline))
|
|
int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect,
|
|
void *dst, void *src, size_t len,
|
|
intptr_t newv, int cpu)
|
|
{
|
|
RSEQ_INJECT_C(9)
|
|
|
|
__asm__ __volatile__ goto (
|
|
RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f)
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[cmpfail])
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1])
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error2])
|
|
#endif
|
|
RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs)
|
|
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
|
|
RSEQ_INJECT_ASM(3)
|
|
RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail])
|
|
RSEQ_INJECT_ASM(4)
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
|
|
RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2])
|
|
#endif
|
|
RSEQ_ASM_OP_R_BAD_MEMCPY(dst, src, len)
|
|
RSEQ_INJECT_ASM(5)
|
|
RSEQ_ASM_OP_FINAL_STORE(newv, v, 3)
|
|
RSEQ_INJECT_ASM(6)
|
|
RSEQ_ASM_DEFINE_ABORT(4, abort)
|
|
: /* gcc asm goto does not allow outputs */
|
|
: [cpu_id] "r" (cpu),
|
|
[current_cpu_id] "Qo" (__rseq_abi.cpu_id),
|
|
[rseq_cs] "m" (__rseq_abi.rseq_cs),
|
|
[expect] "r" (expect),
|
|
[v] "Qo" (*v),
|
|
[newv] "r" (newv),
|
|
[dst] "r" (dst),
|
|
[src] "r" (src),
|
|
[len] "r" (len)
|
|
RSEQ_INJECT_INPUT
|
|
: "memory", RSEQ_ASM_TMP_REG, RSEQ_ASM_TMP_REG_2
|
|
: abort, cmpfail
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
, error1, error2
|
|
#endif
|
|
);
|
|
|
|
return 0;
|
|
abort:
|
|
RSEQ_INJECT_FAILED
|
|
return -1;
|
|
cmpfail:
|
|
return 1;
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
error1:
|
|
rseq_bug("cpu_id comparison failed");
|
|
error2:
|
|
rseq_bug("expected value comparison failed");
|
|
#endif
|
|
}
|
|
|
|
static inline __attribute__((always_inline))
|
|
int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect,
|
|
void *dst, void *src, size_t len,
|
|
intptr_t newv, int cpu)
|
|
{
|
|
RSEQ_INJECT_C(9)
|
|
|
|
__asm__ __volatile__ goto (
|
|
RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f)
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[cmpfail])
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1])
|
|
RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error2])
|
|
#endif
|
|
RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs)
|
|
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
|
|
RSEQ_INJECT_ASM(3)
|
|
RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail])
|
|
RSEQ_INJECT_ASM(4)
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
|
|
RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2])
|
|
#endif
|
|
RSEQ_ASM_OP_R_BAD_MEMCPY(dst, src, len)
|
|
RSEQ_INJECT_ASM(5)
|
|
RSEQ_ASM_OP_FINAL_STORE_RELEASE(newv, v, 3)
|
|
RSEQ_INJECT_ASM(6)
|
|
RSEQ_ASM_DEFINE_ABORT(4, abort)
|
|
: /* gcc asm goto does not allow outputs */
|
|
: [cpu_id] "r" (cpu),
|
|
[current_cpu_id] "Qo" (__rseq_abi.cpu_id),
|
|
[rseq_cs] "m" (__rseq_abi.rseq_cs),
|
|
[expect] "r" (expect),
|
|
[v] "Qo" (*v),
|
|
[newv] "r" (newv),
|
|
[dst] "r" (dst),
|
|
[src] "r" (src),
|
|
[len] "r" (len)
|
|
RSEQ_INJECT_INPUT
|
|
: "memory", RSEQ_ASM_TMP_REG, RSEQ_ASM_TMP_REG_2
|
|
: abort, cmpfail
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
, error1, error2
|
|
#endif
|
|
);
|
|
|
|
return 0;
|
|
abort:
|
|
RSEQ_INJECT_FAILED
|
|
return -1;
|
|
cmpfail:
|
|
return 1;
|
|
#ifdef RSEQ_COMPARE_TWICE
|
|
error1:
|
|
rseq_bug("cpu_id comparison failed");
|
|
error2:
|
|
rseq_bug("expected value comparison failed");
|
|
#endif
|
|
}
|
|
|
|
#endif /* !RSEQ_SKIP_FASTPATH */
|