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3ffc17d876
On MIPS64 we define the default CAC_BASE as one of the xkphys regions of the virtual address space. Since the CCA is encoded in bits 61:59 of xkphys addresses, fixing CAC_BASE to any particular one prevents us from dynamically changing the CCA as we do for MIPS32 where CAC_BASE is placed within kseg0. In order to make the kernel more generic, drop the current kludge that gives CAC_BASE CCA=3 if CONFIG_DMA_NONCOHERENT is selected (disregarding CONFIG_DMA_MAYBE_COHERENT) & CCA=5 (which is not standardised by the architecture) otherwise. Instead read Config.K0 and generate the appropriate offset into xkphys, presuming that either the bootloader or early kernel code will have configured Config.K0 appropriately. This seems like the best option for a generic implementation. The ip27 spaces.h is adjusted to set its former value of CAC_BASE, since it's the only user of CAC_BASE from assembly (in its smp_slave_setup macro). This allows the generic case to focus solely on C code without breaking ip27. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14351/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
154 lines
4.1 KiB
C
154 lines
4.1 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996, 99 Ralf Baechle
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* Copyright (C) 2000, 2002 Maciej W. Rozycki
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* Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
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*/
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#ifndef _ASM_ADDRSPACE_H
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#define _ASM_ADDRSPACE_H
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#include <spaces.h>
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/*
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* Configure language
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*/
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#ifdef __ASSEMBLY__
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#define _ATYPE_
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#define _ATYPE32_
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#define _ATYPE64_
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#define _CONST64_(x) x
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#else
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#define _ATYPE_ __PTRDIFF_TYPE__
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#define _ATYPE32_ int
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#define _ATYPE64_ __s64
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#ifdef CONFIG_64BIT
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#define _CONST64_(x) x ## L
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#else
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#define _CONST64_(x) x ## LL
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#endif
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#endif
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/*
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* 32-bit MIPS address spaces
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*/
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#ifdef __ASSEMBLY__
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#define _ACAST32_
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#define _ACAST64_
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#else
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#define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */
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#define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */
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#endif
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/*
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* Returns the kernel segment base of a given address
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*/
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#define KSEGX(a) ((_ACAST32_(a)) & _ACAST32_(0xe0000000))
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/*
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* Returns the physical address of a CKSEGx / XKPHYS address
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*/
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#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
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#define XPHYSADDR(a) ((_ACAST64_(a)) & \
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_CONST64_(0x0000ffffffffffff))
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#ifdef CONFIG_64BIT
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/*
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* Memory segments (64bit kernel mode addresses)
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* The compatibility segments use the full 64-bit sign extended value. Note
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* the R8000 doesn't have them so don't reference these in generic MIPS code.
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*/
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#define XKUSEG _CONST64_(0x0000000000000000)
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#define XKSSEG _CONST64_(0x4000000000000000)
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#define XKPHYS _CONST64_(0x8000000000000000)
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#define XKSEG _CONST64_(0xc000000000000000)
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#define CKSEG0 _CONST64_(0xffffffff80000000)
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#define CKSEG1 _CONST64_(0xffffffffa0000000)
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#define CKSSEG _CONST64_(0xffffffffc0000000)
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#define CKSEG3 _CONST64_(0xffffffffe0000000)
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#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
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#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
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#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
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#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
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#else
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#define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
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#define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
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#define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
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#define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
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/*
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* Map an address to a certain kernel segment
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*/
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#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
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#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
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#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
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#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
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/*
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* Memory segments (32bit kernel mode addresses)
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* These are the traditional names used in the 32-bit universe.
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*/
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#define KUSEG 0x00000000
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#define KSEG0 0x80000000
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#define KSEG1 0xa0000000
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#define KSEG2 0xc0000000
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#define KSEG3 0xe0000000
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#define CKUSEG 0x00000000
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#define CKSEG0 0x80000000
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#define CKSEG1 0xa0000000
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#define CKSEG2 0xc0000000
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#define CKSEG3 0xe0000000
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#endif
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/*
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* Cache modes for XKPHYS address conversion macros
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*/
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#define K_CALG_COH_EXCL1_NOL2 0
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#define K_CALG_COH_SHRL1_NOL2 1
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#define K_CALG_UNCACHED 2
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#define K_CALG_NONCOHERENT 3
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#define K_CALG_COH_EXCL 4
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#define K_CALG_COH_SHAREABLE 5
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#define K_CALG_NOTUSED 6
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#define K_CALG_UNCACHED_ACCEL 7
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/*
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* 64-bit address conversions
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*/
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#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
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#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
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#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
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#define PHYS_TO_XKPHYS(cm, a) (XKPHYS | (_ACAST64_(cm) << 59) | (a))
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/*
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* The ultimate limited of the 64-bit MIPS architecture: 2 bits for selecting
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* the region, 3 bits for the CCA mode. This leaves 59 bits of which the
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* R8000 implements most with its 48-bit physical address space.
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*/
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#define TO_PHYS_MASK _CONST64_(0x07ffffffffffffff) /* 2^^59 - 1 */
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#ifndef CONFIG_CPU_R8000
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/*
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* The R8000 doesn't have the 32-bit compat spaces so we don't define them
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* in order to catch bugs in the source code.
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*/
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#define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000)
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#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
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#endif
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#define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK)
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#define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE)
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#endif /* _ASM_ADDRSPACE_H */
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