Alexander Graf 8175e5b79c KVM: Add KVM_IRQCHIP_NUM_PINS in addition to KVM_IOAPIC_NUM_PINS ... The concept of routing interrupt lines to an irqchip is nothing that is IOAPIC specific. Every irqchip has a maximum number of pins that can be linked to irq lines. So let's add a new define that allows us to reuse generic code for non-IOAPIC platforms. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Michael S. Tsirkin <mst@redhat.com>		2013-04-26 20:27:13 +02:00
..
assigned-dev.c	KVM: Let ioapic know the irq line status	2013-04-15 23:20:34 -03:00
async_pf.c
async_pf.h
coalesced_mmio.c
coalesced_mmio.h
eventfd.c	KVM: Let ioapic know the irq line status	2013-04-15 23:20:34 -03:00
ioapic.c	KVM: Set TMR when programming ioapic entry	2013-04-16 16:32:40 -03:00
ioapic.h	KVM: Set TMR when programming ioapic entry	2013-04-16 16:32:40 -03:00
iodev.h
iommu.c	kvm: Obey read-only mappings in iommu	2013-01-27 12:41:41 +02:00
irq_comm.c	KVM: Add KVM_IRQCHIP_NUM_PINS in addition to KVM_IOAPIC_NUM_PINS	2013-04-26 20:27:13 +02:00
Kconfig
kvm_main.c	KVM: VMX: Add the deliver posted interrupt algorithm	2013-04-16 16:32:40 -03:00