mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 12:26:40 +07:00
f5a98f37a5
This patch adds support for PT3 PCIe cards. PT3 has an FPGA PCIe bridge chip, a TC90522 demod chip and a VA4M6JC2103 tuner module which contains two QM1D1C0042 chips for ISDB-S and two MxL301RF's for ISDB-T. It can receive and deliver 4 (2x ISDB-S, 2x ISDB-T) streams simultaneously, and a kthread is used per stream to poll incoming data, because PT3 does not have interrupts. As an antenna input for each delivery system is split in the tuner module and shared between the corresponding two tuner chips, LNB/LNA controls that the FPGA chip provides are (naturally) shared as well. The tuner chips also share the power line in the tuner module, which is controlled on/off by a GPIO pin of the demod chip. As with the demod chip and the ISDB-T tuner chip, the init sequences/register settings for those chips are not disclosed and stored in a private memory of the FPGA, PT3 driver executes the init of those chips on behalf of their drivers. Signed-off-by: Akihiro Tsukada <tskd08@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
226 lines
5.3 KiB
C
226 lines
5.3 KiB
C
/*
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* Earthsoft PT3 driver
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*
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* Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include "pt3.h"
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#define PT3_ACCESS_UNIT (TS_PACKET_SZ * 128)
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#define PT3_BUF_CANARY (0x74)
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static u32 get_dma_base(int idx)
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{
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int i;
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i = (idx == 1 || idx == 2) ? 3 - idx : idx;
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return REG_DMA_BASE + 0x18 * i;
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}
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int pt3_stop_dma(struct pt3_adapter *adap)
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{
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struct pt3_board *pt3 = adap->dvb_adap.priv;
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u32 base;
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u32 stat;
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int retry;
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base = get_dma_base(adap->adap_idx);
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stat = ioread32(pt3->regs[0] + base + OFST_STATUS);
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if (!(stat & 0x01))
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return 0;
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iowrite32(0x02, pt3->regs[0] + base + OFST_DMA_CTL);
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for (retry = 0; retry < 5; retry++) {
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stat = ioread32(pt3->regs[0] + base + OFST_STATUS);
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if (!(stat & 0x01))
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return 0;
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msleep(50);
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}
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return -EIO;
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}
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int pt3_start_dma(struct pt3_adapter *adap)
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{
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struct pt3_board *pt3 = adap->dvb_adap.priv;
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u32 base = get_dma_base(adap->adap_idx);
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iowrite32(0x02, pt3->regs[0] + base + OFST_DMA_CTL);
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iowrite32(lower_32_bits(adap->desc_buf[0].b_addr),
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pt3->regs[0] + base + OFST_DMA_DESC_L);
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iowrite32(upper_32_bits(adap->desc_buf[0].b_addr),
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pt3->regs[0] + base + OFST_DMA_DESC_H);
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iowrite32(0x01, pt3->regs[0] + base + OFST_DMA_CTL);
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return 0;
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}
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static u8 *next_unit(struct pt3_adapter *adap, int *idx, int *ofs)
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{
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*ofs += PT3_ACCESS_UNIT;
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if (*ofs >= DATA_BUF_SZ) {
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*ofs -= DATA_BUF_SZ;
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(*idx)++;
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if (*idx == adap->num_bufs)
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*idx = 0;
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}
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return &adap->buffer[*idx].data[*ofs];
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}
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int pt3_proc_dma(struct pt3_adapter *adap)
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{
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int idx, ofs;
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idx = adap->buf_idx;
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ofs = adap->buf_ofs;
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if (adap->buffer[idx].data[ofs] == PT3_BUF_CANARY)
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return 0;
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while (*next_unit(adap, &idx, &ofs) != PT3_BUF_CANARY) {
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u8 *p;
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p = &adap->buffer[adap->buf_idx].data[adap->buf_ofs];
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if (adap->num_discard > 0)
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adap->num_discard--;
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else if (adap->buf_ofs + PT3_ACCESS_UNIT > DATA_BUF_SZ) {
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dvb_dmx_swfilter_packets(&adap->demux, p,
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(DATA_BUF_SZ - adap->buf_ofs) / TS_PACKET_SZ);
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dvb_dmx_swfilter_packets(&adap->demux,
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adap->buffer[idx].data, ofs / TS_PACKET_SZ);
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} else
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dvb_dmx_swfilter_packets(&adap->demux, p,
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PT3_ACCESS_UNIT / TS_PACKET_SZ);
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*p = PT3_BUF_CANARY;
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adap->buf_idx = idx;
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adap->buf_ofs = ofs;
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}
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return 0;
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}
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void pt3_init_dmabuf(struct pt3_adapter *adap)
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{
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int idx, ofs;
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u8 *p;
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idx = 0;
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ofs = 0;
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p = adap->buffer[0].data;
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/* mark the whole buffers as "not written yet" */
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while (idx < adap->num_bufs) {
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p[ofs] = PT3_BUF_CANARY;
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ofs += PT3_ACCESS_UNIT;
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if (ofs >= DATA_BUF_SZ) {
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ofs -= DATA_BUF_SZ;
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idx++;
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p = adap->buffer[idx].data;
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}
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}
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adap->buf_idx = 0;
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adap->buf_ofs = 0;
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}
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void pt3_free_dmabuf(struct pt3_adapter *adap)
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{
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struct pt3_board *pt3;
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int i;
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pt3 = adap->dvb_adap.priv;
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for (i = 0; i < adap->num_bufs; i++)
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dma_free_coherent(&pt3->pdev->dev, DATA_BUF_SZ,
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adap->buffer[i].data, adap->buffer[i].b_addr);
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adap->num_bufs = 0;
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for (i = 0; i < adap->num_desc_bufs; i++)
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dma_free_coherent(&pt3->pdev->dev, PAGE_SIZE,
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adap->desc_buf[i].descs, adap->desc_buf[i].b_addr);
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adap->num_desc_bufs = 0;
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}
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int pt3_alloc_dmabuf(struct pt3_adapter *adap)
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{
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struct pt3_board *pt3;
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void *p;
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int i, j;
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int idx, ofs;
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int num_desc_bufs;
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dma_addr_t data_addr, desc_addr;
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struct xfer_desc *d;
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pt3 = adap->dvb_adap.priv;
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adap->num_bufs = 0;
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adap->num_desc_bufs = 0;
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for (i = 0; i < pt3->num_bufs; i++) {
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p = dma_alloc_coherent(&pt3->pdev->dev, DATA_BUF_SZ,
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&adap->buffer[i].b_addr, GFP_KERNEL);
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if (p == NULL)
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goto failed;
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adap->buffer[i].data = p;
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adap->num_bufs++;
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}
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pt3_init_dmabuf(adap);
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/* build circular-linked pointers (xfer_desc) to the data buffers*/
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idx = 0;
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ofs = 0;
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num_desc_bufs =
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DIV_ROUND_UP(adap->num_bufs * DATA_BUF_XFERS, DESCS_IN_PAGE);
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for (i = 0; i < num_desc_bufs; i++) {
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p = dma_alloc_coherent(&pt3->pdev->dev, PAGE_SIZE,
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&desc_addr, GFP_KERNEL);
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if (p == NULL)
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goto failed;
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adap->num_desc_bufs++;
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adap->desc_buf[i].descs = p;
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adap->desc_buf[i].b_addr = desc_addr;
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if (i > 0) {
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d = &adap->desc_buf[i - 1].descs[DESCS_IN_PAGE - 1];
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d->next_l = lower_32_bits(desc_addr);
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d->next_h = upper_32_bits(desc_addr);
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}
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for (j = 0; j < DESCS_IN_PAGE; j++) {
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data_addr = adap->buffer[idx].b_addr + ofs;
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d = &adap->desc_buf[i].descs[j];
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d->addr_l = lower_32_bits(data_addr);
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d->addr_h = upper_32_bits(data_addr);
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d->size = DATA_XFER_SZ;
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desc_addr += sizeof(struct xfer_desc);
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d->next_l = lower_32_bits(desc_addr);
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d->next_h = upper_32_bits(desc_addr);
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ofs += DATA_XFER_SZ;
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if (ofs >= DATA_BUF_SZ) {
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ofs -= DATA_BUF_SZ;
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idx++;
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if (idx >= adap->num_bufs) {
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desc_addr = adap->desc_buf[0].b_addr;
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d->next_l = lower_32_bits(desc_addr);
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d->next_h = upper_32_bits(desc_addr);
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return 0;
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}
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}
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}
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}
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return 0;
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failed:
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pt3_free_dmabuf(adap);
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return -ENOMEM;
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}
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