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810f1512dc
This patch fixes an assumption that cclk's initial divisor will always be 1 (or 0 in the register). TSCALE is always initialized on startup with a value of 4 regardless of the inital cclk divisor; so, we can't make the assumption without making lots of other assumptions. The TPERIOD value is set with a value of the current cclk (value / (HZ * TSCALE)) - 1; so, we need to adjust based on this initial frequency and not use cclk's initial divisor for adjusting the tscale. Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com> |
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.. | ||
arch_checks.c | ||
cache-c.c | ||
cache.S | ||
clock.h | ||
clocks-init.c | ||
cpufreq.c | ||
dpmc_modes.S | ||
dpmc.c | ||
entry.S | ||
head.S | ||
interrupt.S | ||
ints-priority.c | ||
Makefile | ||
pm.c | ||
smp.c |