Alexandru Ardelean 8105936684 spi: tegra114: change format for spi_set_cs_timing() function ... The initial version of `spi_set_cs_timing()` was implemented with consideration only for clock-cycles as delay. For cases like `CS setup` time, it's sometimes needed that micro-seconds (or nano-seconds) are required, or sometimes even longer delays, for cases where the device needs a little longer to start transferring that after CS is asserted. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-15-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>		2019-10-15 11:45:49 +01:00
..
ad7877.h
ads7846.h
at73c213.h
at86rf230.h
cc2520.h
corgi_lcd.h
ds1305.h
eeprom.h
flash.h
ifx_modem.h
l4f00242t03.h
libertas_spi.h
lms283gf05.h
max7301.h
mc33880.h
mcp23s08.h
mmc_spi.h
mxs-spi.h
pxa2xx_spi.h
rspi.h
s3c24xx.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
sh_hspi.h
sh_msiof.h
spi_bitbang.h
spi_gpio.h
spi_oc_tiny.h
spi-fsl-dspi.h
spi-mem.h
spi.h	spi: tegra114: change format for spi_set_cs_timing() function	2019-10-15 11:45:49 +01:00
tdo24m.h
tle62x0.h
xilinx_spi.h