mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-18 07:36:45 +07:00
80f23935ca
PowerPC's "cmp" instruction has four operands. Normally people write
"cmpw" or "cmpd" for the second cmp operand 0 or 1. But, frequently
people forget, and write "cmp" with just three operands.
With older binutils this is silently accepted as if this was "cmpw",
while often "cmpd" is wanted. With newer binutils GAS will complain
about this for 64-bit code. For 32-bit code it still silently assumes
"cmpw" is what is meant.
In this instance the code comes directly from ISA v2.07, including the
cmp, but cmpd is correct. Backport to stable so that new toolchains can
build old kernels.
Fixes: 948cf67c47 ("powerpc: Add NAP mode support on Power7 in HV mode")
Cc: stable@vger.kernel.org # v3.0
Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
36 lines
881 B
C
36 lines
881 B
C
#ifndef _ASM_POWERPC_CPUIDLE_H
|
|
#define _ASM_POWERPC_CPUIDLE_H
|
|
|
|
#ifdef CONFIG_PPC_POWERNV
|
|
/* Used in powernv idle state management */
|
|
#define PNV_THREAD_RUNNING 0
|
|
#define PNV_THREAD_NAP 1
|
|
#define PNV_THREAD_SLEEP 2
|
|
#define PNV_THREAD_WINKLE 3
|
|
#define PNV_CORE_IDLE_LOCK_BIT 0x100
|
|
#define PNV_CORE_IDLE_THREAD_BITS 0x0FF
|
|
|
|
#ifndef __ASSEMBLY__
|
|
extern u32 pnv_fastsleep_workaround_at_entry[];
|
|
extern u32 pnv_fastsleep_workaround_at_exit[];
|
|
|
|
extern u64 pnv_first_deep_stop_state;
|
|
#endif
|
|
|
|
#endif
|
|
|
|
/* Idle state entry routines */
|
|
#ifdef CONFIG_PPC_P7_NAP
|
|
#define IDLE_STATE_ENTER_SEQ(IDLE_INST) \
|
|
/* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
|
|
std r0,0(r1); \
|
|
ptesync; \
|
|
ld r0,0(r1); \
|
|
1: cmpd cr0,r0,r0; \
|
|
bne 1b; \
|
|
IDLE_INST; \
|
|
b .
|
|
#endif /* CONFIG_PPC_P7_NAP */
|
|
|
|
#endif
|