Christoph Hellwig 80e61fcd23 arc: remove the partial DMA_ATTR_NON_CONSISTENT support ... The arc DMA code supports DMA_ATTR_NON_CONSISTENT allocations, but does not provide a cache_sync operation. This means any user of it will never be able to actually transfer cache ownership and thus cause coherency bugs. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com> Tested-by: Evgeniy Paltsev <paltsev@synopsys.com>		2019-06-25 08:14:24 +02:00
..
cache.c	ARC: PAE40: don't panic and instead turn off hw ioc	2019-04-02 12:03:07 -07:00
dma.c	arc: remove the partial DMA_ATTR_NON_CONSISTENT support	2019-06-25 08:14:24 +02:00
extable.c	ARC: uaccess: enable INLINE_COPY_{TO,FROM}_USER ...	2017-03-30 00:07:48 -04:00
fault.c	ARC: mm: do_page_fault fixes #1: relinquish mmap_sem if signal arrives while handle_mm_fault	2019-01-17 16:24:39 -08:00
highmem.c	treewide: add checks for the return value of memblock_alloc*()	2019-03-12 10:04:02 -07:00
init.c	init: provide a generic free_initmem implementation	2019-05-14 09:47:47 -07:00
ioremap.c	ARCv2: Support dynamic peripheral address space in HS38 rel 3.0 cores	2016-09-30 14:48:17 -07:00
Makefile	ARC: mm: HIGHMEM: kmap API implementation	2015-10-28 19:49:04 +05:30
mmap.c	mm: larger stack guard gap, between vmas	2017-06-19 21:50:20 +08:00
tlb.c	ARCv2: Accomodate HS48 MMUv5 by relaxing MMU ver checking	2017-11-06 11:31:21 -08:00
tlbex.S	ARC: [plat-eznps] Fix TLB Errata	2017-08-28 15:17:36 -07:00