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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
271 lines
7.2 KiB
C
271 lines
7.2 KiB
C
/*
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* Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
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* of PCI-SCSI IO processors.
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*
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* Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
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*
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* This driver is derived from the Linux sym53c8xx driver.
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* Copyright (C) 1998-2000 Gerard Roudier
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*
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* The sym53c8xx driver is derived from the ncr53c8xx driver that had been
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* a port of the FreeBSD ncr driver to Linux-1.2.13.
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*
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* The original ncr driver has been written for 386bsd and FreeBSD by
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* Wolfgang Stanglmeier <wolf@cologne.de>
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* Stefan Esser <se@mi.Uni-Koeln.de>
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* Copyright (C) 1994 Wolfgang Stanglmeier
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*
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* Other major contributions:
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*
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* NVRAM detection and reading.
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* Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
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*
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*-----------------------------------------------------------------------------
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef SYM_GLUE_H
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#define SYM_GLUE_H
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/string.h>
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#include <linux/timer.h>
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#include <linux/types.h>
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#include <asm/io.h>
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#ifdef __sparc__
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# include <asm/irq.h>
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#endif
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_transport_spi.h>
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#include <scsi/scsi_host.h>
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#include "sym53c8xx.h"
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#include "sym_defs.h"
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#include "sym_misc.h"
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/*
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* Configuration addendum for Linux.
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*/
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#define SYM_CONF_TIMER_INTERVAL ((HZ+1)/2)
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#undef SYM_OPT_HANDLE_DEVICE_QUEUEING
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#define SYM_OPT_LIMIT_COMMAND_REORDERING
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/*
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* Print a message with severity.
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*/
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#define printf_emerg(args...) printk(KERN_EMERG args)
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#define printf_alert(args...) printk(KERN_ALERT args)
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#define printf_crit(args...) printk(KERN_CRIT args)
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#define printf_err(args...) printk(KERN_ERR args)
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#define printf_warning(args...) printk(KERN_WARNING args)
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#define printf_notice(args...) printk(KERN_NOTICE args)
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#define printf_info(args...) printk(KERN_INFO args)
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#define printf_debug(args...) printk(KERN_DEBUG args)
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#define printf(args...) printk(args)
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/*
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* A 'read barrier' flushes any data that have been prefetched
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* by the processor due to out of order execution. Such a barrier
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* must notably be inserted prior to looking at data that have
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* been DMAed, assuming that program does memory READs in proper
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* order and that the device ensured proper ordering of WRITEs.
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*
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* A 'write barrier' prevents any previous WRITEs to pass further
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* WRITEs. Such barriers must be inserted each time another agent
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* relies on ordering of WRITEs.
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*
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* Note that, due to posting of PCI memory writes, we also must
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* insert dummy PCI read transactions when some ordering involving
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* both directions over the PCI does matter. PCI transactions are
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* fully ordered in each direction.
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*/
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#define MEMORY_READ_BARRIER() rmb()
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#define MEMORY_WRITE_BARRIER() wmb()
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/*
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* IO functions definition for big/little endian CPU support.
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* For now, PCI chips are only supported in little endian addressing mode,
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*/
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#ifdef __BIG_ENDIAN
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#define readw_l2b readw
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#define readl_l2b readl
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#define writew_b2l writew
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#define writel_b2l writel
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#else /* little endian */
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#define readw_raw readw
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#define readl_raw readl
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#define writew_raw writew
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#define writel_raw writel
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#endif /* endian */
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#ifdef SYM_CONF_CHIP_BIG_ENDIAN
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#error "Chips in BIG ENDIAN addressing mode are not (yet) supported"
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#endif
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/*
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* If the CPU and the chip use same endian-ness addressing,
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* no byte reordering is needed for script patching.
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* Macro cpu_to_scr() is to be used for script patching.
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* Macro scr_to_cpu() is to be used for getting a DWORD
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* from the script.
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*/
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#define cpu_to_scr(dw) cpu_to_le32(dw)
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#define scr_to_cpu(dw) le32_to_cpu(dw)
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/*
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* These ones are used as return code from
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* error recovery handlers under Linux.
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*/
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#define SCSI_SUCCESS SUCCESS
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#define SCSI_FAILED FAILED
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/*
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* System specific target data structure.
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* None for now, under Linux.
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*/
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/* #define SYM_HAVE_STCB */
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/*
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* System specific lun data structure.
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*/
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#define SYM_HAVE_SLCB
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struct sym_slcb {
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u_short reqtags; /* Number of tags requested by user */
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u_short scdev_depth; /* Queue depth set in select_queue_depth() */
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};
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/*
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* System specific command data structure.
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* Not needed under Linux.
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*/
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/* struct sym_sccb */
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/*
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* System specific host data structure.
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*/
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struct sym_shcb {
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/*
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* Chip and controller indentification.
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*/
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int unit;
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char inst_name[16];
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char chip_name[8];
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struct pci_dev *device;
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struct Scsi_Host *host;
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void __iomem * ioaddr; /* MMIO kernel io address */
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void __iomem * ramaddr; /* RAM kernel io address */
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u_short io_ws; /* IO window size */
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int irq; /* IRQ number */
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struct timer_list timer; /* Timer handler link header */
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u_long lasttime;
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u_long settle_time; /* Resetting the SCSI BUS */
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u_char settle_time_valid;
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};
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/*
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* Return the name of the controller.
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*/
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#define sym_name(np) (np)->s.inst_name
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struct sym_nvram;
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/*
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* The IO macros require a struct called 's' and are abused in sym_nvram.c
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*/
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struct sym_device {
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struct pci_dev *pdev;
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unsigned long mmio_base;
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unsigned long ram_base;
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struct {
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void __iomem *ioaddr;
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void __iomem *ramaddr;
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} s;
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struct sym_chip chip;
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struct sym_nvram *nvram;
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u_short device_id;
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u_char host_id;
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};
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/*
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* Driver host data structure.
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*/
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struct host_data {
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struct sym_hcb *ncb;
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};
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static inline struct sym_hcb * sym_get_hcb(struct Scsi_Host *host)
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{
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return ((struct host_data *)host->hostdata)->ncb;
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}
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#include "sym_fw.h"
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#include "sym_hipd.h"
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/*
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* Set the status field of a CAM CCB.
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*/
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static __inline void
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sym_set_cam_status(struct scsi_cmnd *cmd, int status)
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{
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cmd->result &= ~(0xff << 16);
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cmd->result |= (status << 16);
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}
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/*
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* Get the status field of a CAM CCB.
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*/
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static __inline int
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sym_get_cam_status(struct scsi_cmnd *cmd)
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{
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return host_byte(cmd->result);
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}
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/*
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* Build CAM result for a successful IO and for a failed IO.
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*/
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static __inline void sym_set_cam_result_ok(struct sym_ccb *cp, struct scsi_cmnd *cmd, int resid)
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{
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cmd->resid = resid;
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cmd->result = (((DID_OK) << 16) + ((cp->ssss_status) & 0x7f));
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}
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void sym_set_cam_result_error(struct sym_hcb *np, struct sym_ccb *cp, int resid);
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void sym_xpt_done(struct sym_hcb *np, struct scsi_cmnd *ccb);
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#define sym_print_addr(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg)
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void sym_xpt_async_bus_reset(struct sym_hcb *np);
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void sym_xpt_async_sent_bdr(struct sym_hcb *np, int target);
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int sym_setup_data_and_start (struct sym_hcb *np, struct scsi_cmnd *csio, struct sym_ccb *cp);
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void sym_log_bus_error(struct sym_hcb *np);
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#endif /* SYM_GLUE_H */
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