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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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faff3d8e85
* clk-renesas: (36 commits) clk: renesas: r7s9210: Add SPI clocks clk: renesas: r7s9210: Move table update to separate function clk: renesas: r7s9210: Convert some clocks to early clk: renesas: cpg-mssr: Add early clock support clk: renesas: r8a77970: Add TPU clock clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0 clk: renesas: cpg-mssr: Add r8a774c0 support clk: renesas: Add r8a774c0 CPG Core Clock Definitions clk: renesas: r8a7743: Add r8a7744 support clk: renesas: Add r8a7744 CPG Core Clock Definitions dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding dt-bindings: clock: renesas: Convert to SPDX identifiers clk: renesas: cpg-mssr: Add R7S9210 support clk: renesas: r8a77970: Add TMU clocks clk: renesas: r8a77970: Add CMT clocks clk: renesas: r9a06g032: Fix UART34567 clock rate clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI clk: renesas: r8a77980: Add CMT clocks clk: renesas: r8a77990: Add missing I2C7 clock ... |
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| .. | ||
| clk-div6.c | ||
| clk-div6.h | ||
| clk-emev2.c | ||
| clk-mstp.c | ||
| clk-r8a73a4.c | ||
| clk-r8a7740.c | ||
| clk-r8a7778.c | ||
| clk-r8a7779.c | ||
| clk-rcar-gen2.c | ||
| clk-rz.c | ||
| clk-sh73a0.c | ||
| Kconfig | ||
| Makefile | ||
| r7s9210-cpg-mssr.c | ||
| r8a774a1-cpg-mssr.c | ||
| r8a774c0-cpg-mssr.c | ||
| r8a7743-cpg-mssr.c | ||
| r8a7745-cpg-mssr.c | ||
| r8a7790-cpg-mssr.c | ||
| r8a7791-cpg-mssr.c | ||
| r8a7792-cpg-mssr.c | ||
| r8a7794-cpg-mssr.c | ||
| r8a7795-cpg-mssr.c | ||
| r8a7796-cpg-mssr.c | ||
| r8a77470-cpg-mssr.c | ||
| r8a77965-cpg-mssr.c | ||
| r8a77970-cpg-mssr.c | ||
| r8a77980-cpg-mssr.c | ||
| r8a77990-cpg-mssr.c | ||
| r8a77995-cpg-mssr.c | ||
| r9a06g032-clocks.c | ||
| rcar-gen2-cpg.c | ||
| rcar-gen2-cpg.h | ||
| rcar-gen3-cpg.c | ||
| rcar-gen3-cpg.h | ||
| rcar-usb2-clock-sel.c | ||
| renesas-cpg-mssr.c | ||
| renesas-cpg-mssr.h | ||