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01fe3aaa3a
In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for a number of drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car Compare Match Timer (CMT) driver to follow this convention. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> --- * I plan to follow up with patches to use these new bindings in the dtsi files for the affected SoCs. v2 * Reorder compat entries so more-specific entries and their fallbacks are grouped with the fallback entry coming last. * Explicitly document fallback v3 * Avoid circular dependency in documentation of fallback behaviour of renesas,cmt-48-gen2 * Use consistent case for SoC names in compat string descriptions
80 lines
3.0 KiB
Plaintext
80 lines
3.0 KiB
Plaintext
* Renesas R-Car Compare Match Timer (CMT)
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The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
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inputs and programmable compare match.
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Channels share hardware resources but their counter and compare match value
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are independent. A particular CMT instance can implement only a subset of the
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channels supported by the CMT model. Channel indices represent the hardware
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position of the channel in the CMT and don't match the channel numbers in the
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datasheets.
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Required Properties:
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- compatible: must contain one or more of the following:
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- "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT
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(CMT0)
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- "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT
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(CMT0)
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- "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT
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(CMT0)
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- "renesas,cmt-32" for all 32-bit CMT without fast clock support
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(CMT0 on sh7372, sh73a0 and r8a7740)
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This is a fallback for the above renesas,cmt-32-* entries.
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- "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast
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clock support (CMT[234])
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- "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast
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clock support (CMT[234])
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- "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast
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clock support (CMT[234])
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- "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support
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(CMT[234] on sh7372, sh73a0 and r8a7740)
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This is a fallback for the above renesas,cmt-32-fast-* entries.
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- "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT
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(CMT1)
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- "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
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(CMT1)
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- "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
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(CMT1)
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- "renesas,cmt-48" for all non-second generation 48-bit CMT
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(CMT1 on sh7372, sh73a0 and r8a7740)
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This is a fallback for the above renesas,cmt-48-* entries.
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- "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT
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(CMT[01])
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- "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT
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(CMT[01])
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- "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT
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(CMT[01])
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- "renesas,cmt-48-gen2" for all second generation 48-bit CMT
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(CMT[01] on r8a73a4, r8a7790 and r8a7791)
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This is a fallback for the renesas,cmt-48-r8a73a4,
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renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.
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- reg: base address and length of the registers block for the timer module.
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- interrupts: interrupt-specifier for the timer, one per channel.
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- clocks: a list of phandle + clock-specifier pairs, one for each entry
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in clock-names.
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- clock-names: must contain "fck" for the functional clock.
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- renesas,channels-mask: bitmask of the available channels.
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Example: R8A7790 (R-Car H2) CMT0 node
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CMT0 on R8A7790 implements hardware channels 5 and 6 only and names
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them channels 0 and 1 in the documentation.
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cmt0: timer@ffca0000 {
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compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
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reg = <0 0xffca0000 0 0x1004>;
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interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
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<0 142 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
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clock-names = "fck";
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renesas,channels-mask = <0x60>;
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};
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