Prike Liang 80381d40c9 drm/amd/powerplay: fix pre-check condition for setting clock range ... This fix will handle some MP1 FW issue like as mclk dpm table in renoir has a reverse dpm clock layout and a zero frequency dpm level as following case. cat pp_dpm_mclk 0: 1200Mhz 1: 1200Mhz 2: 800Mhz 3: 0Mhz Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org		2020-03-05 09:42:08 -05:00
..
acp	drm/amdgpu: fix license on Kconfig and Makefiles	2019-12-11 15:22:08 -05:00
amdgpu	drm/amdgpu: disable 3D pipe 1 on Navi1x	2020-03-05 09:41:55 -05:00
amdkfd	drm/amdkfd: Fix a bug in SDMA RLC queue counting under HWS mode	2020-02-04 10:32:41 -05:00
display	drm/amd/display: fix dcc swath size calculations on dcn1	2020-03-05 09:42:08 -05:00
include	amdgpu/gmc_v9: save/restore sdpif regs during S3	2020-02-25 11:30:42 -05:00
powerplay	drm/amd/powerplay: fix pre-check condition for setting clock range	2020-03-05 09:42:08 -05:00