mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 10:45:09 +07:00
f7018c2135
The drivers/video directory is a mess. It contains generic video related files, directories for backlight, console, linux logo, lots of fbdev device drivers, fbdev framework files. Make some order into the chaos by creating drivers/video/fbdev directory, and move all fbdev related files there. No functionality is changed, although I guess it is possible that some subtle Makefile build order related issue could be created by this patch. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Rob Clark <robdclark@gmail.com> Acked-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
65 lines
2.2 KiB
C
65 lines
2.2 KiB
C
#ifndef CARMINE_CARMINE_H
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#define CARMINE_CARMINE_H
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#define CARMINE_MEMORY_BAR 2
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#define CARMINE_CONFIG_BAR 3
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#define MAX_DISPLAY 2
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#define CARMINE_DISPLAY_MEM (800 * 600 * 4)
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#define CARMINE_TOTAL_DIPLAY_MEM (CARMINE_DISPLAY_MEM * MAX_DISPLAY)
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#define CARMINE_USE_DISPLAY0 (1 << 0)
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#define CARMINE_USE_DISPLAY1 (1 << 1)
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/*
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* This values work on the eval card. Custom boards may use different timings,
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* here an example :)
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*/
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/* DRAM initialization values */
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#ifdef CONFIG_FB_CARMINE_DRAM_EVAL
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#define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff)
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#define CARMINE_DFLT_IP_DCTL_ADD (0x05c3)
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#define CARMINE_DFLT_IP_DCTL_MODE (0x0121)
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#define CARMINE_DFLT_IP_DCTL_EMODE (0x8000)
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#define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x4749)
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#define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x2a22)
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#define CARMINE_DFLT_IP_DCTL_REFRESH (0x0042)
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#define CARMINE_DFLT_IP_DCTL_STATES (0x0003)
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#define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020)
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#define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f)
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#define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000)
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#define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x6646)
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#define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x0055)
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#define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0021)
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#define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002)
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#define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555)
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#define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555)
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#define CARMINE_DCTL_DLL_RESET (1)
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#endif
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#ifdef CONFIG_CARMINE_DRAM_CUSTOM
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#define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff)
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#define CARMINE_DFLT_IP_DCTL_ADD (0x03b2)
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#define CARMINE_DFLT_IP_DCTL_MODE (0x0161)
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#define CARMINE_DFLT_IP_DCTL_EMODE (0x8000)
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#define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x2628)
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#define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x1a09)
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#define CARMINE_DFLT_IP_DCTL_REFRESH (0x00fe)
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#define CARMINE_DFLT_IP_DCTL_STATES (0x0003)
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#define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020)
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#define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f)
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#define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000)
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#define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x0646)
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#define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x55aa)
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#define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0061)
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#define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002)
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#define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555)
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#define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555)
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#define CARMINE_DCTL_DLL_RESET (1)
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#endif
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#endif
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