mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 08:33:45 +07:00
61a988183a
Specify 'vdd' and 'vddio' supplies for accelerometer to avoid warnings during boot. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, Cc: linux-kernel@vger.kernel.org Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
1094 lines
23 KiB
Plaintext
1094 lines
23 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2016-2017 Zodiac Inflight Innovations
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/sound/fsl-imx-audmux.h>
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/ {
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chosen {
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stdout-path = &uart1;
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};
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aliases {
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mdio-gpio0 = &mdio1;
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rtc0 = &ds1341;
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};
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mdio1: mdio {
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compatible = "virtual,mdio-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mdio1>;
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gpios = <&gpio6 5 GPIO_ACTIVE_HIGH
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&gpio6 4 GPIO_ACTIVE_HIGH>;
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phy: ethernet-phy@0 {
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pinctrl-0 = <&pinctrl_rmii_phy_irq>;
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pinctrl-names = "default";
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reg = <0>;
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interrupt-parent = <&gpio3>;
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interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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reg_28p0v: regulator-28p0v {
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compatible = "regulator-fixed";
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regulator-name = "28V_IN";
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regulator-min-microvolt = <28000000>;
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regulator-max-microvolt = <28000000>;
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regulator-always-on;
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};
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reg_12p0v: regulator-12p0v {
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compatible = "regulator-fixed";
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vin-supply = <®_28p0v>;
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regulator-name = "12V_MAIN";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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regulator-always-on;
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};
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reg_5p0v_main: regulator-5p0v-main {
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compatible = "regulator-fixed";
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vin-supply = <®_12p0v>;
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regulator-name = "5V_MAIN";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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reg_5p0v_user_usb: regulator-5p0v-user-usb {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_user_usb>;
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vin-supply = <®_5p0v_main>;
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regulator-name = "5V_USER_USB";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
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startup-delay-us = <1000>;
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};
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reg_3p3v_pmic: regulator-3p3v-pmic {
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compatible = "regulator-fixed";
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vin-supply = <®_12p0v>;
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regulator-name = "PMIC_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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vin-supply = <®_3p3v_pmic>;
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regulator-name = "GEN_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_3p3v_sd: regulator-3p3v-sd {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_3p3v_sd>;
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vin-supply = <®_3p3v>;
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regulator-name = "3V3_SD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <1000>;
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enable-active-high;
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regulator-always-on;
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};
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reg_3p3v_display: regulator-3p3v-display {
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compatible = "regulator-fixed";
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vin-supply = <®_12p0v>;
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regulator-name = "3V3_DISPLAY";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_3p3v_ssd: regulator-3p3v-ssd {
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compatible = "regulator-fixed";
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vin-supply = <®_12p0v>;
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regulator-name = "3V3_SSD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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sound1 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Front";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound1_codec>;
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simple-audio-card,frame-master = <&sound1_codec>;
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Headphone Jack", "HPLEFT",
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"Headphone Jack", "HPRIGHT",
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"LEFTIN", "HPL",
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"RIGHTIN", "HPR";
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simple-audio-card,aux-devs = <&hpa1>;
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sound1_cpu: simple-audio-card,cpu {
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sound-dai = <&ssi2>;
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};
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sound1_codec: simple-audio-card,codec {
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sound-dai = <&codec1>;
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clocks = <&cs2000>;
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};
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};
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sound2 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Back";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound2_codec>;
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simple-audio-card,frame-master = <&sound2_codec>;
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Headphone Jack", "HPLEFT",
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"Headphone Jack", "HPRIGHT",
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"LEFTIN", "HPL",
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"RIGHTIN", "HPR";
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simple-audio-card,aux-devs = <&hpa2>;
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sound2_cpu: simple-audio-card,cpu {
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sound-dai = <&ssi1>;
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};
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sound2_codec: simple-audio-card,codec {
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sound-dai = <&codec2>;
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clocks = <&cs2000>;
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};
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};
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panel {
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power-supply = <®_3p3v_display>;
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backlight = <&sp_backlight>;
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status = "disabled";
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port {
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panel_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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};
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disp0: disp0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx-parallel-display";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_disp0>;
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status = "disabled";
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port@0 {
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reg = <0>;
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disp0_in_0: endpoint {
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remote-endpoint = <&ipu1_di0_disp0>;
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};
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};
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port@1 {
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reg = <1>;
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disp0_out: endpoint {
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remote-endpoint = <&tc358767_in>;
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};
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};
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};
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cs2000_ref: cs2000-ref {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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cs2000_in_dummy: cs2000-in-dummy {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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edp_refclk: edp-refclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <19200000>;
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};
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};
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&cpu0 {
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fsl,soc-operating-points = <
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/* ARM kHz SOC-PU uV */
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1200000 1300000
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996000 1275000
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852000 1275000
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792000 1200000
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396000 1200000
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>;
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};
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®_arm {
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vin-supply = <&sw1a_reg>;
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};
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®_pu {
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vin-supply = <&sw1c_reg>;
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};
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®_soc {
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vin-supply = <&sw1c_reg>;
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};
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&ldb {
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lvds-channel@0 {
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port@4 {
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reg = <4>;
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lvds0_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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uart-has-rtscts;
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linux,rs485-enabled-at-boot-time;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "okay";
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rave-sp {
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compatible = "zii,rave-sp-rdu2";
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current-speed = <1000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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watchdog {
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compatible = "zii,rave-sp-watchdog";
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};
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sp_backlight: backlight {
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compatible = "zii,rave-sp-backlight";
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};
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pwrbutton {
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compatible = "zii,rave-sp-pwrbutton";
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};
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eeprom@a3 {
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compatible = "zii,rave-sp-eeprom";
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reg = <0xa3 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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zii,eeprom-name = "dds-eeprom";
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};
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eeprom@a4 {
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compatible = "zii,rave-sp-eeprom";
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reg = <0xa4 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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zii,eeprom-name = "main-eeprom";
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};
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};
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
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status = "okay";
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flash@0 {
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compatible = "st,m25p128", "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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clock-frequency = <100000>;
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status = "okay";
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codec2: codec@18 {
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compatible = "ti,tlv320dac3100";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_codec2>;
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reg = <0x18>;
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#sound-dai-cells = <0>;
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HPVDD-supply = <®_3p3v>;
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SPRVDD-supply = <®_3p3v>;
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SPLVDD-supply = <®_3p3v>;
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AVDD-supply = <®_3p3v>;
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IOVDD-supply = <®_3p3v>;
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DVDD-supply = <&vgen4_reg>;
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reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
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};
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accel@1c {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_accel>;
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compatible = "fsl,mma8451";
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reg = <0x1c>;
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interrupt-parent = <&gpio1>;
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interrupt-names = "INT2";
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interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
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vdd-supply = <®_3p3v>;
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vddio-supply = <®_3p3v>;
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};
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hpa2: amp@60 {
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compatible = "ti,tpa6130a2";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tpa2>;
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reg = <0x60>;
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power-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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Vdd-supply = <®_5p0v_main>;
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};
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edp-bridge@68 {
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compatible = "toshiba,tc358767";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tc358767>;
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reg = <0x68>;
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shutdown-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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clock-names = "ref";
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clocks = <&edp_refclk>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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tc358767_in: endpoint {
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remote-endpoint = <&disp0_out>;
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};
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};
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};
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};
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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clock-frequency = <100000>;
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status = "okay";
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pmic@8 {
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compatible = "fsl,pfuze100";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pfuze100_irq>;
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reg = <0x08>;
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interrupt-parent = <&gpio7>;
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interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b_reg: sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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};
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vgen4_reg: vgen4 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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};
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};
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};
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watchdog@38 {
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compatible = "zii,rave-wdt";
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reg = <0x38>;
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};
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temp-sense@48 {
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compatible = "national,lm75";
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reg = <0x48>;
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};
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cs2000: clkgen@4e {
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compatible = "cirrus,cs2000-cp";
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reg = <0x4e>;
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#clock-cells = <0>;
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clock-names = "clk_in", "ref_clk";
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clocks = <&cs2000_in_dummy>, <&cs2000_ref>;
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assigned-clocks = <&cs2000>;
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assigned-clock-rates = <24000000>;
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};
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eeprom@54 {
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compatible = "atmel,24c128";
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reg = <0x54>;
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};
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ds1341: rtc@68 {
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compatible = "dallas,ds1341";
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reg = <0x68>;
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};
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};
|
|
|
|
&i2c3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
|
clock-frequency = <400000>;
|
|
status = "okay";
|
|
|
|
codec1: codec@18 {
|
|
compatible = "ti,tlv320dac3100";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_codec1>;
|
|
reg = <0x18>;
|
|
#sound-dai-cells = <0>;
|
|
HPVDD-supply = <®_3p3v>;
|
|
SPRVDD-supply = <®_3p3v>;
|
|
SPLVDD-supply = <®_3p3v>;
|
|
AVDD-supply = <®_3p3v>;
|
|
IOVDD-supply = <®_3p3v>;
|
|
DVDD-supply = <&vgen4_reg>;
|
|
reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
touchscreen@20 {
|
|
compatible = "syna,rmi4-i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ts>;
|
|
reg = <0x20>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
|
vdd-supply = <®_5p0v_main>;
|
|
vio-supply = <®_3p3v>;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
rmi4-f01@1 {
|
|
reg = <0x1>;
|
|
syna,nosleep-mode = <2>;
|
|
};
|
|
|
|
rmi4-f11@11 {
|
|
reg = <0x11>;
|
|
touchscreen-inverted-x;
|
|
touchscreen-swapped-x-y;
|
|
syna,sensor-type = <1>;
|
|
};
|
|
|
|
rmi4-f12@12 {
|
|
reg = <0x12>;
|
|
touchscreen-inverted-x;
|
|
touchscreen-swapped-x-y;
|
|
syna,sensor-type = <1>;
|
|
};
|
|
};
|
|
|
|
touchscreen@2a {
|
|
compatible = "eeti,exc3000";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ts>;
|
|
reg = <0x2a>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
|
touchscreen-inverted-x;
|
|
touchscreen-swapped-x-y;
|
|
status = "disabled";
|
|
};
|
|
|
|
hpa1: amp@60 {
|
|
compatible = "ti,tpa6130a2";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_tpa1>;
|
|
reg = <0x60>;
|
|
power-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
|
|
Vdd-supply = <®_5p0v_main>;
|
|
};
|
|
};
|
|
|
|
&ipu1_di0_disp0 {
|
|
remote-endpoint = <&disp0_in_0>;
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie>;
|
|
reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
|
|
host@0 {
|
|
reg = <0 0 0 0 0>;
|
|
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
|
|
i210: i210@0 {
|
|
reg = <0 0 0 0 0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
|
vmmc-supply = <®_3p3v_sd>;
|
|
vqmmc-supply = <®_3p3v>;
|
|
no-1-8-v;
|
|
no-sdio;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
|
vmmc-supply = <®_3p3v_sd>;
|
|
vqmmc-supply = <®_3p3v>;
|
|
no-1-8-v;
|
|
no-sdio;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc4>;
|
|
bus-width = <8>;
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <®_3p3v>;
|
|
no-1-8-v;
|
|
non-removable;
|
|
no-sdio;
|
|
no-sd;
|
|
status = "okay";
|
|
};
|
|
|
|
&sata {
|
|
target-supply = <®_3p3v_ssd>;
|
|
status = "okay";
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_enet>;
|
|
phy-mode = "rmii";
|
|
phy-handle = <&phy>;
|
|
phy-reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
|
phy-reset-duration = <100>;
|
|
phy-supply = <®_3p3v>;
|
|
status = "okay";
|
|
|
|
mdio {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
switch: switch@0 {
|
|
compatible = "marvell,mv88e6085";
|
|
pinctrl-0 = <&pinctrl_switch_irq>;
|
|
pinctrl-names = "default";
|
|
reg = <0>;
|
|
dsa,member = <0 0>;
|
|
eeprom-length = <512>;
|
|
interrupt-parent = <&gpio6>;
|
|
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
label = "gigabit_proc";
|
|
phy-handle = <&switchphy0>;
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
label = "netaux";
|
|
phy-handle = <&switchphy1>;
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
label = "cpu";
|
|
ethernet = <&fec>;
|
|
|
|
fixed-link {
|
|
speed = <100>;
|
|
full-duplex;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
label = "netright";
|
|
phy-handle = <&switchphy3>;
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
label = "netleft";
|
|
phy-handle = <&switchphy4>;
|
|
};
|
|
};
|
|
|
|
mdio {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
switchphy0: switchphy@0 {
|
|
reg = <0>;
|
|
interrupt-parent = <&switch>;
|
|
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
switchphy1: switchphy@1 {
|
|
reg = <1>;
|
|
interrupt-parent = <&switch>;
|
|
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
switchphy2: switchphy@2 {
|
|
reg = <2>;
|
|
interrupt-parent = <&switch>;
|
|
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
switchphy3: switchphy@3 {
|
|
reg = <3>;
|
|
interrupt-parent = <&switch>;
|
|
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
switchphy4: switchphy@4 {
|
|
reg = <4>;
|
|
interrupt-parent = <&switch>;
|
|
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&usbh1 {
|
|
vbus-supply = <®_5p0v_main>;
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_5p0v_user_usb>;
|
|
disable-over-current;
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
};
|
|
|
|
&snvs_rtc {
|
|
status = "disabled";
|
|
};
|
|
|
|
&ssi1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&audmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_audmux>;
|
|
status = "okay";
|
|
|
|
ssi1 {
|
|
fsl,audmux-port = <0>;
|
|
fsl,port-config = <
|
|
(IMX_AUDMUX_V2_PTCR_SYN |
|
|
IMX_AUDMUX_V2_PTCR_TFSEL(2) |
|
|
IMX_AUDMUX_V2_PTCR_TCSEL(2) |
|
|
IMX_AUDMUX_V2_PTCR_TFSDIR |
|
|
IMX_AUDMUX_V2_PTCR_TCLKDIR)
|
|
IMX_AUDMUX_V2_PDCR_RXDSEL(2)
|
|
>;
|
|
};
|
|
|
|
aud3 {
|
|
fsl,audmux-port = <2>;
|
|
fsl,port-config = <
|
|
IMX_AUDMUX_V2_PTCR_SYN
|
|
IMX_AUDMUX_V2_PDCR_RXDSEL(0)
|
|
>;
|
|
};
|
|
|
|
ssi2 {
|
|
fsl,audmux-port = <1>;
|
|
fsl,port-config = <
|
|
(IMX_AUDMUX_V2_PTCR_SYN |
|
|
IMX_AUDMUX_V2_PTCR_TFSEL(4) |
|
|
IMX_AUDMUX_V2_PTCR_TCSEL(4) |
|
|
IMX_AUDMUX_V2_PTCR_TFSDIR |
|
|
IMX_AUDMUX_V2_PTCR_TCLKDIR)
|
|
IMX_AUDMUX_V2_PDCR_RXDSEL(4)
|
|
>;
|
|
};
|
|
|
|
aud5 {
|
|
fsl,audmux-port = <4>;
|
|
fsl,port-config = <
|
|
IMX_AUDMUX_V2_PTCR_SYN
|
|
IMX_AUDMUX_V2_PDCR_RXDSEL(1)
|
|
>;
|
|
};
|
|
};
|
|
|
|
&wdog1 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_accel: accelgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x4001b000
|
|
>;
|
|
};
|
|
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
|
|
MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0
|
|
MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_codec1: dac1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_codec2: dac2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_disp0: disp0grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100f9
|
|
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100f9
|
|
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100f9
|
|
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x100f9
|
|
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x100f9
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_enet: enetgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x000b1
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b1
|
|
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x100f5
|
|
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x100f5
|
|
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x100c0
|
|
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x100c0
|
|
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x100f5
|
|
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x100f5
|
|
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x40010040
|
|
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x100b0
|
|
MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
|
|
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_mdio1: bitbangmdiogrp {
|
|
fsl,pins = <
|
|
/* Bitbang MDIO for DEB Switch */
|
|
MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x4001b030
|
|
MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40018830
|
|
>;
|
|
};
|
|
|
|
pinctrl_pcie: pciegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x10038
|
|
>;
|
|
};
|
|
|
|
pinctrl_pfuze100_irq: pfuze100grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x40010000
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_3p3v_sd: mmcsupply1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x858
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_user_usb: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_rmii_phy_irq: phygrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x40010000
|
|
>;
|
|
};
|
|
|
|
pinctrl_switch_irq: switchgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x4001b000
|
|
>;
|
|
};
|
|
|
|
pinctrl_tc358767: tc358767grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x10
|
|
>;
|
|
};
|
|
|
|
pinctrl_tpa1: tpa6130-1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_tpa2: tpa6130-2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_ts: tsgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
|
|
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart4: uart4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x10059
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10069
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
|
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x40010040
|
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x40010040
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x10059
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10069
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x40010040
|
|
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x40010040
|
|
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc4: usdhc4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
|
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
|
|
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
|
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
|
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
|
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
|
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
|
|
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
|
|
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
|
|
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
|
|
MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x1b0b1
|
|
>;
|
|
};
|
|
};
|