Paul Hsieh 7fc5c319ef drm/amd/display: dmcu wait loop calculation is incorrect in RV ... [Why] Driver already get display clock from SMU base on MHz, but driver read again and mutiple 1000 cause wait loop value is overflow. [How] remove coding error Signed-off-by: Paul Hsieh <paul.hsieh@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-04-22 18:11:48 -04:00
..
amdgpu_dm	drm/amd/display: make all backlight calls link based	2020-04-22 18:11:48 -04:00
dc	drm/amd/display: dmcu wait loop calculation is incorrect in RV	2020-04-22 18:11:48 -04:00
dmub	drm/amd/display: Various fixes for PSR on DMCUB	2020-04-22 18:11:48 -04:00
include	drm/amd/display: query hdcp capability during link detect	2020-04-09 10:43:17 -04:00
modules	drm/amd/display: Change infopacket type programming	2020-04-22 18:11:47 -04:00
Kconfig	amdgpu: Enable initial DCN support on POWER	2019-12-18 16:09:05 -05:00
Makefile
TODO