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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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83f51f06d1
The DRA72 EVM Rev C straps the DP83867 GigaBit Ethernet phy's RX_DV/RX_CTRL pin in mode 1. Unfortunately, the phy data manual disallows this. Add "ti,dp83867-rxctrl-strap-quirk" property to the phy's device-tree node to allow kernel to enable software workaround for this incorrect strap setting. This is as suggested by the phy's datamanual and ensures proper operation of this PHY. This needs to be done for both instances of this PHY present on the board. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
87 lines
1.9 KiB
Plaintext
87 lines
1.9 KiB
Plaintext
/*
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* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "dra72-evm-common.dtsi"
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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model = "TI DRA722 Rev C EVM";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
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};
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};
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&i2c1 {
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tps65917: tps65917@58 {
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reg = <0x58>;
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interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
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};
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};
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#include "dra72-evm-tps65917.dtsi"
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&ldo2_reg {
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/* LDO2_OUT --> VDDA_1V8_PHY2 */
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regulator-always-on;
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regulator-boot-on;
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};
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&hdmi {
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vdda-supply = <&ldo2_reg>;
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};
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&pcf_gpio_21 {
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interrupt-parent = <&gpio3>;
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interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
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};
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&mac {
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mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
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<&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
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<&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
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dual_emac;
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <2>;
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phy-mode = "rgmii-id";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <3>;
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phy-mode = "rgmii-id";
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dual_emac_res_vlan = <2>;
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};
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&davinci_mdio {
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dp83867_0: ethernet-phy@2 {
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reg = <2>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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ti,min-output-impedance;
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interrupt-parent = <&gpio6>;
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interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
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ti,dp83867-rxctrl-strap-quirk;
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};
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dp83867_1: ethernet-phy@3 {
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reg = <3>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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ti,min-output-impedance;
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interrupt-parent = <&gpio6>;
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interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
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ti,dp83867-rxctrl-strap-quirk;
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};
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};
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