mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-06 06:26:40 +07:00
f4bda337bb
Allow drivers to indicate their mactime is at RX completion and adjust for this in mac80211. Also rename the existing RX_FLAG_MACTIME_MPDU to RX_FLAG_MACTIME_START to clarify its intent. Based on similar code by Johannes Berg. Signed-off-by: Thomas Pedersen <thomas@cozybit.com> [fix docs, atheros drivers] Signed-off-by: Johannes Berg <johannes.berg@intel.com>
943 lines
25 KiB
C
943 lines
25 KiB
C
/*
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Broadcom B43 wireless driver
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Transmission (TX/RX) related functions.
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Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
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Copyright (C) 2005 Stefano Brivio <stefano.brivio@polimi.it>
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Copyright (C) 2005, 2006 Michael Buesch <m@bues.ch>
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Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
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Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
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Boston, MA 02110-1301, USA.
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*/
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#include "xmit.h"
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#include "phy_common.h"
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#include "dma.h"
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#include "pio.h"
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static const struct b43_tx_legacy_rate_phy_ctl_entry b43_tx_legacy_rate_phy_ctl[] = {
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{ B43_CCK_RATE_1MB, 0x0, 0x0 },
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{ B43_CCK_RATE_2MB, 0x0, 0x1 },
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{ B43_CCK_RATE_5MB, 0x0, 0x2 },
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{ B43_CCK_RATE_11MB, 0x0, 0x3 },
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{ B43_OFDM_RATE_6MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_BPSK },
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{ B43_OFDM_RATE_9MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_BPSK },
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{ B43_OFDM_RATE_12MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QPSK },
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{ B43_OFDM_RATE_18MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QPSK },
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{ B43_OFDM_RATE_24MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QAM16 },
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{ B43_OFDM_RATE_36MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM16 },
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{ B43_OFDM_RATE_48MB, B43_TXH_PHY1_CRATE_2_3, B43_TXH_PHY1_MODUL_QAM64 },
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{ B43_OFDM_RATE_54MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM64 },
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};
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static const struct b43_tx_legacy_rate_phy_ctl_entry *
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b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate)
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{
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const struct b43_tx_legacy_rate_phy_ctl_entry *e;
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(b43_tx_legacy_rate_phy_ctl); i++) {
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e = &(b43_tx_legacy_rate_phy_ctl[i]);
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if (e->bitrate == bitrate)
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return e;
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}
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B43_WARN_ON(1);
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return NULL;
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}
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/* Extract the bitrate index out of a CCK PLCP header. */
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static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp)
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{
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switch (plcp->raw[0]) {
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case 0x0A:
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return 0;
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case 0x14:
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return 1;
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case 0x37:
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return 2;
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case 0x6E:
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return 3;
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}
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return -1;
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}
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/* Extract the bitrate index out of an OFDM PLCP header. */
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static int b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 *plcp, bool aphy)
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{
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int base = aphy ? 0 : 4;
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switch (plcp->raw[0] & 0xF) {
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case 0xB:
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return base + 0;
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case 0xF:
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return base + 1;
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case 0xA:
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return base + 2;
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case 0xE:
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return base + 3;
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case 0x9:
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return base + 4;
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case 0xD:
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return base + 5;
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case 0x8:
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return base + 6;
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case 0xC:
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return base + 7;
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}
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return -1;
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}
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u8 b43_plcp_get_ratecode_cck(const u8 bitrate)
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{
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switch (bitrate) {
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case B43_CCK_RATE_1MB:
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return 0x0A;
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case B43_CCK_RATE_2MB:
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return 0x14;
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case B43_CCK_RATE_5MB:
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return 0x37;
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case B43_CCK_RATE_11MB:
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return 0x6E;
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}
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B43_WARN_ON(1);
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return 0;
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}
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u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate)
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{
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switch (bitrate) {
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case B43_OFDM_RATE_6MB:
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return 0xB;
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case B43_OFDM_RATE_9MB:
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return 0xF;
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case B43_OFDM_RATE_12MB:
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return 0xA;
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case B43_OFDM_RATE_18MB:
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return 0xE;
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case B43_OFDM_RATE_24MB:
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return 0x9;
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case B43_OFDM_RATE_36MB:
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return 0xD;
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case B43_OFDM_RATE_48MB:
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return 0x8;
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case B43_OFDM_RATE_54MB:
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return 0xC;
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}
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B43_WARN_ON(1);
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return 0;
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}
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void b43_generate_plcp_hdr(struct b43_plcp_hdr4 *plcp,
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const u16 octets, const u8 bitrate)
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{
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__u8 *raw = plcp->raw;
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if (b43_is_ofdm_rate(bitrate)) {
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u32 d;
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d = b43_plcp_get_ratecode_ofdm(bitrate);
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B43_WARN_ON(octets & 0xF000);
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d |= (octets << 5);
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plcp->data = cpu_to_le32(d);
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} else {
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u32 plen;
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plen = octets * 16 / bitrate;
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if ((octets * 16 % bitrate) > 0) {
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plen++;
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if ((bitrate == B43_CCK_RATE_11MB)
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&& ((octets * 8 % 11) < 4)) {
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raw[1] = 0x84;
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} else
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raw[1] = 0x04;
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} else
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raw[1] = 0x04;
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plcp->data |= cpu_to_le32(plen << 16);
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raw[0] = b43_plcp_get_ratecode_cck(bitrate);
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}
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}
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/* TODO: verify if needed for SSLPN or LCN */
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static u16 b43_generate_tx_phy_ctl1(struct b43_wldev *dev, u8 bitrate)
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{
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const struct b43_phy *phy = &dev->phy;
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const struct b43_tx_legacy_rate_phy_ctl_entry *e;
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u16 control = 0;
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u16 bw;
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if (phy->type == B43_PHYTYPE_LP)
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bw = B43_TXH_PHY1_BW_20;
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else /* FIXME */
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bw = B43_TXH_PHY1_BW_20;
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if (0) { /* FIXME: MIMO */
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} else if (b43_is_cck_rate(bitrate) && phy->type != B43_PHYTYPE_LP) {
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control = bw;
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} else {
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control = bw;
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e = b43_tx_legacy_rate_phy_ctl_ent(bitrate);
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if (e) {
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control |= e->coding_rate;
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control |= e->modulation;
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}
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control |= B43_TXH_PHY1_MODE_SISO;
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}
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return control;
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}
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static u8 b43_calc_fallback_rate(u8 bitrate)
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{
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switch (bitrate) {
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case B43_CCK_RATE_1MB:
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return B43_CCK_RATE_1MB;
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case B43_CCK_RATE_2MB:
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return B43_CCK_RATE_1MB;
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case B43_CCK_RATE_5MB:
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return B43_CCK_RATE_2MB;
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case B43_CCK_RATE_11MB:
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return B43_CCK_RATE_5MB;
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case B43_OFDM_RATE_6MB:
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return B43_CCK_RATE_5MB;
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case B43_OFDM_RATE_9MB:
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return B43_OFDM_RATE_6MB;
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case B43_OFDM_RATE_12MB:
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return B43_OFDM_RATE_9MB;
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case B43_OFDM_RATE_18MB:
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return B43_OFDM_RATE_12MB;
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case B43_OFDM_RATE_24MB:
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return B43_OFDM_RATE_18MB;
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case B43_OFDM_RATE_36MB:
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return B43_OFDM_RATE_24MB;
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case B43_OFDM_RATE_48MB:
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return B43_OFDM_RATE_36MB;
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case B43_OFDM_RATE_54MB:
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return B43_OFDM_RATE_48MB;
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}
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B43_WARN_ON(1);
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return 0;
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}
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/* Generate a TX data header. */
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int b43_generate_txhdr(struct b43_wldev *dev,
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u8 *_txhdr,
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struct sk_buff *skb_frag,
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struct ieee80211_tx_info *info,
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u16 cookie)
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{
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const unsigned char *fragment_data = skb_frag->data;
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unsigned int fragment_len = skb_frag->len;
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struct b43_txhdr *txhdr = (struct b43_txhdr *)_txhdr;
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const struct b43_phy *phy = &dev->phy;
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const struct ieee80211_hdr *wlhdr =
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(const struct ieee80211_hdr *)fragment_data;
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int use_encryption = !!info->control.hw_key;
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__le16 fctl = wlhdr->frame_control;
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struct ieee80211_rate *fbrate;
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u8 rate, rate_fb;
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int rate_ofdm, rate_fb_ofdm;
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unsigned int plcp_fragment_len;
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u32 mac_ctl = 0;
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u16 phy_ctl = 0;
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bool fill_phy_ctl1 = (phy->type == B43_PHYTYPE_LP ||
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phy->type == B43_PHYTYPE_N ||
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phy->type == B43_PHYTYPE_HT);
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u8 extra_ft = 0;
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struct ieee80211_rate *txrate;
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struct ieee80211_tx_rate *rates;
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memset(txhdr, 0, sizeof(*txhdr));
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txrate = ieee80211_get_tx_rate(dev->wl->hw, info);
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rate = txrate ? txrate->hw_value : B43_CCK_RATE_1MB;
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rate_ofdm = b43_is_ofdm_rate(rate);
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fbrate = ieee80211_get_alt_retry_rate(dev->wl->hw, info, 0) ? : txrate;
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rate_fb = fbrate->hw_value;
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rate_fb_ofdm = b43_is_ofdm_rate(rate_fb);
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if (rate_ofdm)
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txhdr->phy_rate = b43_plcp_get_ratecode_ofdm(rate);
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else
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txhdr->phy_rate = b43_plcp_get_ratecode_cck(rate);
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txhdr->mac_frame_ctl = wlhdr->frame_control;
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memcpy(txhdr->tx_receiver, wlhdr->addr1, 6);
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/* Calculate duration for fallback rate */
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if ((rate_fb == rate) ||
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(wlhdr->duration_id & cpu_to_le16(0x8000)) ||
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(wlhdr->duration_id == cpu_to_le16(0))) {
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/* If the fallback rate equals the normal rate or the
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* dur_id field contains an AID, CFP magic or 0,
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* use the original dur_id field. */
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txhdr->dur_fb = wlhdr->duration_id;
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} else {
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txhdr->dur_fb = ieee80211_generic_frame_duration(
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dev->wl->hw, info->control.vif, info->band,
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fragment_len, fbrate);
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}
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plcp_fragment_len = fragment_len + FCS_LEN;
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if (use_encryption) {
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u8 key_idx = info->control.hw_key->hw_key_idx;
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struct b43_key *key;
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int wlhdr_len;
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size_t iv_len;
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B43_WARN_ON(key_idx >= ARRAY_SIZE(dev->key));
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key = &(dev->key[key_idx]);
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if (unlikely(!key->keyconf)) {
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/* This key is invalid. This might only happen
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* in a short timeframe after machine resume before
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* we were able to reconfigure keys.
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* Drop this packet completely. Do not transmit it
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* unencrypted to avoid leaking information. */
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return -ENOKEY;
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}
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/* Hardware appends ICV. */
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plcp_fragment_len += info->control.hw_key->icv_len;
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key_idx = b43_kidx_to_fw(dev, key_idx);
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mac_ctl |= (key_idx << B43_TXH_MAC_KEYIDX_SHIFT) &
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B43_TXH_MAC_KEYIDX;
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mac_ctl |= (key->algorithm << B43_TXH_MAC_KEYALG_SHIFT) &
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B43_TXH_MAC_KEYALG;
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wlhdr_len = ieee80211_hdrlen(fctl);
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if (key->algorithm == B43_SEC_ALGO_TKIP) {
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u16 phase1key[5];
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int i;
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/* we give the phase1key and iv16 here, the key is stored in
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* shm. With that the hardware can do phase 2 and encryption.
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*/
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ieee80211_get_tkip_p1k(info->control.hw_key, skb_frag, phase1key);
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/* phase1key is in host endian. Copy to little-endian txhdr->iv. */
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for (i = 0; i < 5; i++) {
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txhdr->iv[i * 2 + 0] = phase1key[i];
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txhdr->iv[i * 2 + 1] = phase1key[i] >> 8;
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}
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/* iv16 */
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memcpy(txhdr->iv + 10, ((u8 *) wlhdr) + wlhdr_len, 3);
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} else {
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iv_len = min((size_t) info->control.hw_key->iv_len,
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ARRAY_SIZE(txhdr->iv));
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memcpy(txhdr->iv, ((u8 *) wlhdr) + wlhdr_len, iv_len);
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}
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}
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switch (dev->fw.hdr_format) {
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case B43_FW_HDR_598:
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b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_598.plcp),
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plcp_fragment_len, rate);
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break;
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case B43_FW_HDR_351:
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b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_351.plcp),
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plcp_fragment_len, rate);
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break;
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case B43_FW_HDR_410:
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b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_410.plcp),
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plcp_fragment_len, rate);
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break;
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}
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b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->plcp_fb),
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plcp_fragment_len, rate_fb);
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/* Extra Frame Types */
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if (rate_fb_ofdm)
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extra_ft |= B43_TXH_EFT_FB_OFDM;
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else
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extra_ft |= B43_TXH_EFT_FB_CCK;
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/* Set channel radio code. Note that the micrcode ORs 0x100 to
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* this value before comparing it to the value in SHM, if this
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* is a 5Ghz packet.
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*/
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txhdr->chan_radio_code = phy->channel;
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/* PHY TX Control word */
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if (rate_ofdm)
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phy_ctl |= B43_TXH_PHY_ENC_OFDM;
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else
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phy_ctl |= B43_TXH_PHY_ENC_CCK;
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if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
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phy_ctl |= B43_TXH_PHY_SHORTPRMBL;
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switch (b43_ieee80211_antenna_sanitize(dev, 0)) {
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case 0: /* Default */
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phy_ctl |= B43_TXH_PHY_ANT01AUTO;
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break;
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case 1: /* Antenna 0 */
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phy_ctl |= B43_TXH_PHY_ANT0;
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break;
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case 2: /* Antenna 1 */
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phy_ctl |= B43_TXH_PHY_ANT1;
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break;
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case 3: /* Antenna 2 */
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phy_ctl |= B43_TXH_PHY_ANT2;
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break;
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case 4: /* Antenna 3 */
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phy_ctl |= B43_TXH_PHY_ANT3;
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break;
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default:
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B43_WARN_ON(1);
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}
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rates = info->control.rates;
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/* MAC control */
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if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
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mac_ctl |= B43_TXH_MAC_ACK;
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/* use hardware sequence counter as the non-TID counter */
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if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
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mac_ctl |= B43_TXH_MAC_HWSEQ;
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if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
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mac_ctl |= B43_TXH_MAC_STMSDU;
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if (phy->type == B43_PHYTYPE_A)
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mac_ctl |= B43_TXH_MAC_5GHZ;
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/* Overwrite rates[0].count to make the retry calculation
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* in the tx status easier. need the actual retry limit to
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* detect whether the fallback rate was used.
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*/
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if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
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(rates[0].count <= dev->wl->hw->conf.long_frame_max_tx_count)) {
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rates[0].count = dev->wl->hw->conf.long_frame_max_tx_count;
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mac_ctl |= B43_TXH_MAC_LONGFRAME;
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} else {
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rates[0].count = dev->wl->hw->conf.short_frame_max_tx_count;
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}
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/* Generate the RTS or CTS-to-self frame */
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if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
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(rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) {
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unsigned int len;
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struct ieee80211_hdr *uninitialized_var(hdr);
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int rts_rate, rts_rate_fb;
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int rts_rate_ofdm, rts_rate_fb_ofdm;
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struct b43_plcp_hdr6 *uninitialized_var(plcp);
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struct ieee80211_rate *rts_cts_rate;
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rts_cts_rate = ieee80211_get_rts_cts_rate(dev->wl->hw, info);
|
|
|
|
rts_rate = rts_cts_rate ? rts_cts_rate->hw_value : B43_CCK_RATE_1MB;
|
|
rts_rate_ofdm = b43_is_ofdm_rate(rts_rate);
|
|
rts_rate_fb = b43_calc_fallback_rate(rts_rate);
|
|
rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb);
|
|
|
|
if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
|
|
struct ieee80211_cts *uninitialized_var(cts);
|
|
|
|
switch (dev->fw.hdr_format) {
|
|
case B43_FW_HDR_598:
|
|
cts = (struct ieee80211_cts *)
|
|
(txhdr->format_598.rts_frame);
|
|
break;
|
|
case B43_FW_HDR_351:
|
|
cts = (struct ieee80211_cts *)
|
|
(txhdr->format_351.rts_frame);
|
|
break;
|
|
case B43_FW_HDR_410:
|
|
cts = (struct ieee80211_cts *)
|
|
(txhdr->format_410.rts_frame);
|
|
break;
|
|
}
|
|
ieee80211_ctstoself_get(dev->wl->hw, info->control.vif,
|
|
fragment_data, fragment_len,
|
|
info, cts);
|
|
mac_ctl |= B43_TXH_MAC_SENDCTS;
|
|
len = sizeof(struct ieee80211_cts);
|
|
} else {
|
|
struct ieee80211_rts *uninitialized_var(rts);
|
|
|
|
switch (dev->fw.hdr_format) {
|
|
case B43_FW_HDR_598:
|
|
rts = (struct ieee80211_rts *)
|
|
(txhdr->format_598.rts_frame);
|
|
break;
|
|
case B43_FW_HDR_351:
|
|
rts = (struct ieee80211_rts *)
|
|
(txhdr->format_351.rts_frame);
|
|
break;
|
|
case B43_FW_HDR_410:
|
|
rts = (struct ieee80211_rts *)
|
|
(txhdr->format_410.rts_frame);
|
|
break;
|
|
}
|
|
ieee80211_rts_get(dev->wl->hw, info->control.vif,
|
|
fragment_data, fragment_len,
|
|
info, rts);
|
|
mac_ctl |= B43_TXH_MAC_SENDRTS;
|
|
len = sizeof(struct ieee80211_rts);
|
|
}
|
|
len += FCS_LEN;
|
|
|
|
/* Generate the PLCP headers for the RTS/CTS frame */
|
|
switch (dev->fw.hdr_format) {
|
|
case B43_FW_HDR_598:
|
|
plcp = &txhdr->format_598.rts_plcp;
|
|
break;
|
|
case B43_FW_HDR_351:
|
|
plcp = &txhdr->format_351.rts_plcp;
|
|
break;
|
|
case B43_FW_HDR_410:
|
|
plcp = &txhdr->format_410.rts_plcp;
|
|
break;
|
|
}
|
|
b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
|
|
len, rts_rate);
|
|
plcp = &txhdr->rts_plcp_fb;
|
|
b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
|
|
len, rts_rate_fb);
|
|
|
|
switch (dev->fw.hdr_format) {
|
|
case B43_FW_HDR_598:
|
|
hdr = (struct ieee80211_hdr *)
|
|
(&txhdr->format_598.rts_frame);
|
|
break;
|
|
case B43_FW_HDR_351:
|
|
hdr = (struct ieee80211_hdr *)
|
|
(&txhdr->format_351.rts_frame);
|
|
break;
|
|
case B43_FW_HDR_410:
|
|
hdr = (struct ieee80211_hdr *)
|
|
(&txhdr->format_410.rts_frame);
|
|
break;
|
|
}
|
|
txhdr->rts_dur_fb = hdr->duration_id;
|
|
|
|
if (rts_rate_ofdm) {
|
|
extra_ft |= B43_TXH_EFT_RTS_OFDM;
|
|
txhdr->phy_rate_rts =
|
|
b43_plcp_get_ratecode_ofdm(rts_rate);
|
|
} else {
|
|
extra_ft |= B43_TXH_EFT_RTS_CCK;
|
|
txhdr->phy_rate_rts =
|
|
b43_plcp_get_ratecode_cck(rts_rate);
|
|
}
|
|
if (rts_rate_fb_ofdm)
|
|
extra_ft |= B43_TXH_EFT_RTSFB_OFDM;
|
|
else
|
|
extra_ft |= B43_TXH_EFT_RTSFB_CCK;
|
|
|
|
if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS &&
|
|
fill_phy_ctl1) {
|
|
txhdr->phy_ctl1_rts = cpu_to_le16(
|
|
b43_generate_tx_phy_ctl1(dev, rts_rate));
|
|
txhdr->phy_ctl1_rts_fb = cpu_to_le16(
|
|
b43_generate_tx_phy_ctl1(dev, rts_rate_fb));
|
|
}
|
|
}
|
|
|
|
/* Magic cookie */
|
|
switch (dev->fw.hdr_format) {
|
|
case B43_FW_HDR_598:
|
|
txhdr->format_598.cookie = cpu_to_le16(cookie);
|
|
break;
|
|
case B43_FW_HDR_351:
|
|
txhdr->format_351.cookie = cpu_to_le16(cookie);
|
|
break;
|
|
case B43_FW_HDR_410:
|
|
txhdr->format_410.cookie = cpu_to_le16(cookie);
|
|
break;
|
|
}
|
|
|
|
if (fill_phy_ctl1) {
|
|
txhdr->phy_ctl1 =
|
|
cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate));
|
|
txhdr->phy_ctl1_fb =
|
|
cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate_fb));
|
|
}
|
|
|
|
/* Apply the bitfields */
|
|
txhdr->mac_ctl = cpu_to_le32(mac_ctl);
|
|
txhdr->phy_ctl = cpu_to_le16(phy_ctl);
|
|
txhdr->extra_ft = extra_ft;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static s8 b43_rssi_postprocess(struct b43_wldev *dev,
|
|
u8 in_rssi, int ofdm,
|
|
int adjust_2053, int adjust_2050)
|
|
{
|
|
struct b43_phy *phy = &dev->phy;
|
|
struct b43_phy_g *gphy = phy->g;
|
|
s32 tmp;
|
|
|
|
switch (phy->radio_ver) {
|
|
case 0x2050:
|
|
if (ofdm) {
|
|
tmp = in_rssi;
|
|
if (tmp > 127)
|
|
tmp -= 256;
|
|
tmp *= 73;
|
|
tmp /= 64;
|
|
if (adjust_2050)
|
|
tmp += 25;
|
|
else
|
|
tmp -= 3;
|
|
} else {
|
|
if (dev->dev->bus_sprom->
|
|
boardflags_lo & B43_BFL_RSSI) {
|
|
if (in_rssi > 63)
|
|
in_rssi = 63;
|
|
B43_WARN_ON(phy->type != B43_PHYTYPE_G);
|
|
tmp = gphy->nrssi_lt[in_rssi];
|
|
tmp = 31 - tmp;
|
|
tmp *= -131;
|
|
tmp /= 128;
|
|
tmp -= 57;
|
|
} else {
|
|
tmp = in_rssi;
|
|
tmp = 31 - tmp;
|
|
tmp *= -149;
|
|
tmp /= 128;
|
|
tmp -= 68;
|
|
}
|
|
if (phy->type == B43_PHYTYPE_G && adjust_2050)
|
|
tmp += 25;
|
|
}
|
|
break;
|
|
case 0x2060:
|
|
if (in_rssi > 127)
|
|
tmp = in_rssi - 256;
|
|
else
|
|
tmp = in_rssi;
|
|
break;
|
|
default:
|
|
tmp = in_rssi;
|
|
tmp -= 11;
|
|
tmp *= 103;
|
|
tmp /= 64;
|
|
if (adjust_2053)
|
|
tmp -= 109;
|
|
else
|
|
tmp -= 83;
|
|
}
|
|
|
|
return (s8) tmp;
|
|
}
|
|
|
|
//TODO
|
|
#if 0
|
|
static s8 b43_rssinoise_postprocess(struct b43_wldev *dev, u8 in_rssi)
|
|
{
|
|
struct b43_phy *phy = &dev->phy;
|
|
s8 ret;
|
|
|
|
if (phy->type == B43_PHYTYPE_A) {
|
|
//TODO: Incomplete specs.
|
|
ret = 0;
|
|
} else
|
|
ret = b43_rssi_postprocess(dev, in_rssi, 0, 1, 1);
|
|
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
|
|
{
|
|
struct ieee80211_rx_status status;
|
|
struct b43_plcp_hdr6 *plcp;
|
|
struct ieee80211_hdr *wlhdr;
|
|
const struct b43_rxhdr_fw4 *rxhdr = _rxhdr;
|
|
__le16 fctl;
|
|
u16 phystat0, phystat3;
|
|
u16 uninitialized_var(chanstat), uninitialized_var(mactime);
|
|
u32 uninitialized_var(macstat);
|
|
u16 chanid;
|
|
u16 phytype;
|
|
int padding, rate_idx;
|
|
|
|
memset(&status, 0, sizeof(status));
|
|
|
|
/* Get metadata about the frame from the header. */
|
|
phystat0 = le16_to_cpu(rxhdr->phy_status0);
|
|
phystat3 = le16_to_cpu(rxhdr->phy_status3);
|
|
switch (dev->fw.hdr_format) {
|
|
case B43_FW_HDR_598:
|
|
macstat = le32_to_cpu(rxhdr->format_598.mac_status);
|
|
mactime = le16_to_cpu(rxhdr->format_598.mac_time);
|
|
chanstat = le16_to_cpu(rxhdr->format_598.channel);
|
|
break;
|
|
case B43_FW_HDR_410:
|
|
case B43_FW_HDR_351:
|
|
macstat = le32_to_cpu(rxhdr->format_351.mac_status);
|
|
mactime = le16_to_cpu(rxhdr->format_351.mac_time);
|
|
chanstat = le16_to_cpu(rxhdr->format_351.channel);
|
|
break;
|
|
}
|
|
phytype = chanstat & B43_RX_CHAN_PHYTYPE;
|
|
|
|
if (unlikely(macstat & B43_RX_MAC_FCSERR)) {
|
|
dev->wl->ieee_stats.dot11FCSErrorCount++;
|
|
status.flag |= RX_FLAG_FAILED_FCS_CRC;
|
|
}
|
|
if (unlikely(phystat0 & (B43_RX_PHYST0_PLCPHCF | B43_RX_PHYST0_PLCPFV)))
|
|
status.flag |= RX_FLAG_FAILED_PLCP_CRC;
|
|
if (phystat0 & B43_RX_PHYST0_SHORTPRMBL)
|
|
status.flag |= RX_FLAG_SHORTPRE;
|
|
if (macstat & B43_RX_MAC_DECERR) {
|
|
/* Decryption with the given key failed.
|
|
* Drop the packet. We also won't be able to decrypt it with
|
|
* the key in software. */
|
|
goto drop;
|
|
}
|
|
|
|
/* Skip PLCP and padding */
|
|
padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
|
|
if (unlikely(skb->len < (sizeof(struct b43_plcp_hdr6) + padding))) {
|
|
b43dbg(dev->wl, "RX: Packet size underrun (1)\n");
|
|
goto drop;
|
|
}
|
|
plcp = (struct b43_plcp_hdr6 *)(skb->data + padding);
|
|
skb_pull(skb, sizeof(struct b43_plcp_hdr6) + padding);
|
|
/* The skb contains the Wireless Header + payload data now */
|
|
if (unlikely(skb->len < (2 + 2 + 6 /*minimum hdr */ + FCS_LEN))) {
|
|
b43dbg(dev->wl, "RX: Packet size underrun (2)\n");
|
|
goto drop;
|
|
}
|
|
wlhdr = (struct ieee80211_hdr *)(skb->data);
|
|
fctl = wlhdr->frame_control;
|
|
|
|
if (macstat & B43_RX_MAC_DEC) {
|
|
unsigned int keyidx;
|
|
int wlhdr_len;
|
|
|
|
keyidx = ((macstat & B43_RX_MAC_KEYIDX)
|
|
>> B43_RX_MAC_KEYIDX_SHIFT);
|
|
/* We must adjust the key index here. We want the "physical"
|
|
* key index, but the ucode passed it slightly different.
|
|
*/
|
|
keyidx = b43_kidx_to_raw(dev, keyidx);
|
|
B43_WARN_ON(keyidx >= ARRAY_SIZE(dev->key));
|
|
|
|
if (dev->key[keyidx].algorithm != B43_SEC_ALGO_NONE) {
|
|
wlhdr_len = ieee80211_hdrlen(fctl);
|
|
if (unlikely(skb->len < (wlhdr_len + 3))) {
|
|
b43dbg(dev->wl,
|
|
"RX: Packet size underrun (3)\n");
|
|
goto drop;
|
|
}
|
|
status.flag |= RX_FLAG_DECRYPTED;
|
|
}
|
|
}
|
|
|
|
/* Link quality statistics */
|
|
switch (chanstat & B43_RX_CHAN_PHYTYPE) {
|
|
case B43_PHYTYPE_HT:
|
|
/* TODO: is max the right choice? */
|
|
status.signal = max_t(__s8,
|
|
max(rxhdr->phy_ht_power0, rxhdr->phy_ht_power1),
|
|
rxhdr->phy_ht_power2);
|
|
break;
|
|
case B43_PHYTYPE_N:
|
|
/* Broadcom has code for min and avg, but always uses max */
|
|
if (rxhdr->power0 == 16 || rxhdr->power0 == 32)
|
|
status.signal = max(rxhdr->power1, rxhdr->power2);
|
|
else
|
|
status.signal = max(rxhdr->power0, rxhdr->power1);
|
|
break;
|
|
case B43_PHYTYPE_A:
|
|
case B43_PHYTYPE_B:
|
|
case B43_PHYTYPE_G:
|
|
case B43_PHYTYPE_LP:
|
|
status.signal = b43_rssi_postprocess(dev, rxhdr->jssi,
|
|
(phystat0 & B43_RX_PHYST0_OFDM),
|
|
(phystat0 & B43_RX_PHYST0_GAINCTL),
|
|
(phystat3 & B43_RX_PHYST3_TRSTATE));
|
|
break;
|
|
}
|
|
|
|
if (phystat0 & B43_RX_PHYST0_OFDM)
|
|
rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
|
|
phytype == B43_PHYTYPE_A);
|
|
else
|
|
rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
|
|
if (unlikely(rate_idx == -1)) {
|
|
/* PLCP seems to be corrupted.
|
|
* Drop the frame, if we are not interested in corrupted frames. */
|
|
if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
|
|
goto drop;
|
|
}
|
|
status.rate_idx = rate_idx;
|
|
status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
|
|
|
|
/*
|
|
* All frames on monitor interfaces and beacons always need a full
|
|
* 64-bit timestamp. Monitor interfaces need it for diagnostic
|
|
* purposes and beacons for IBSS merging.
|
|
* This code assumes we get to process the packet within 16 bits
|
|
* of timestamp, i.e. about 65 milliseconds after the PHY received
|
|
* the first symbol.
|
|
*/
|
|
if (ieee80211_is_beacon(fctl) || dev->wl->radiotap_enabled) {
|
|
u16 low_mactime_now;
|
|
|
|
b43_tsf_read(dev, &status.mactime);
|
|
low_mactime_now = status.mactime;
|
|
status.mactime = status.mactime & ~0xFFFFULL;
|
|
status.mactime += mactime;
|
|
if (low_mactime_now <= mactime)
|
|
status.mactime -= 0x10000;
|
|
status.flag |= RX_FLAG_MACTIME_START;
|
|
}
|
|
|
|
chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT;
|
|
switch (chanstat & B43_RX_CHAN_PHYTYPE) {
|
|
case B43_PHYTYPE_A:
|
|
status.band = IEEE80211_BAND_5GHZ;
|
|
B43_WARN_ON(1);
|
|
/* FIXME: We don't really know which value the "chanid" contains.
|
|
* So the following assignment might be wrong. */
|
|
status.freq = b43_channel_to_freq_5ghz(chanid);
|
|
break;
|
|
case B43_PHYTYPE_G:
|
|
status.band = IEEE80211_BAND_2GHZ;
|
|
/* chanid is the radio channel cookie value as used
|
|
* to tune the radio. */
|
|
status.freq = chanid + 2400;
|
|
break;
|
|
case B43_PHYTYPE_N:
|
|
case B43_PHYTYPE_LP:
|
|
case B43_PHYTYPE_HT:
|
|
/* chanid is the SHM channel cookie. Which is the plain
|
|
* channel number in b43. */
|
|
if (chanstat & B43_RX_CHAN_5GHZ) {
|
|
status.band = IEEE80211_BAND_5GHZ;
|
|
status.freq = b43_freq_to_channel_5ghz(chanid);
|
|
} else {
|
|
status.band = IEEE80211_BAND_2GHZ;
|
|
status.freq = b43_freq_to_channel_2ghz(chanid);
|
|
}
|
|
break;
|
|
default:
|
|
B43_WARN_ON(1);
|
|
goto drop;
|
|
}
|
|
|
|
memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
|
|
ieee80211_rx_ni(dev->wl->hw, skb);
|
|
|
|
#if B43_DEBUG
|
|
dev->rx_count++;
|
|
#endif
|
|
return;
|
|
drop:
|
|
dev_kfree_skb_any(skb);
|
|
}
|
|
|
|
void b43_handle_txstatus(struct b43_wldev *dev,
|
|
const struct b43_txstatus *status)
|
|
{
|
|
b43_debugfs_log_txstat(dev, status);
|
|
|
|
if (status->intermediate)
|
|
return;
|
|
if (status->for_ampdu)
|
|
return;
|
|
if (!status->acked)
|
|
dev->wl->ieee_stats.dot11ACKFailureCount++;
|
|
if (status->rts_count) {
|
|
if (status->rts_count == 0xF) //FIXME
|
|
dev->wl->ieee_stats.dot11RTSFailureCount++;
|
|
else
|
|
dev->wl->ieee_stats.dot11RTSSuccessCount++;
|
|
}
|
|
|
|
if (b43_using_pio_transfers(dev))
|
|
b43_pio_handle_txstatus(dev, status);
|
|
else
|
|
b43_dma_handle_txstatus(dev, status);
|
|
|
|
b43_phy_txpower_check(dev, 0);
|
|
}
|
|
|
|
/* Fill out the mac80211 TXstatus report based on the b43-specific
|
|
* txstatus report data. This returns a boolean whether the frame was
|
|
* successfully transmitted. */
|
|
bool b43_fill_txstatus_report(struct b43_wldev *dev,
|
|
struct ieee80211_tx_info *report,
|
|
const struct b43_txstatus *status)
|
|
{
|
|
bool frame_success = true;
|
|
int retry_limit;
|
|
|
|
/* preserve the confiured retry limit before clearing the status
|
|
* The xmit function has overwritten the rc's value with the actual
|
|
* retry limit done by the hardware */
|
|
retry_limit = report->status.rates[0].count;
|
|
ieee80211_tx_info_clear_status(report);
|
|
|
|
if (status->acked) {
|
|
/* The frame was ACKed. */
|
|
report->flags |= IEEE80211_TX_STAT_ACK;
|
|
} else {
|
|
/* The frame was not ACKed... */
|
|
if (!(report->flags & IEEE80211_TX_CTL_NO_ACK)) {
|
|
/* ...but we expected an ACK. */
|
|
frame_success = false;
|
|
}
|
|
}
|
|
if (status->frame_count == 0) {
|
|
/* The frame was not transmitted at all. */
|
|
report->status.rates[0].count = 0;
|
|
} else if (status->rts_count > dev->wl->hw->conf.short_frame_max_tx_count) {
|
|
/*
|
|
* If the short retries (RTS, not data frame) have exceeded
|
|
* the limit, the hw will not have tried the selected rate,
|
|
* but will have used the fallback rate instead.
|
|
* Don't let the rate control count attempts for the selected
|
|
* rate in this case, otherwise the statistics will be off.
|
|
*/
|
|
report->status.rates[0].count = 0;
|
|
report->status.rates[1].count = status->frame_count;
|
|
} else {
|
|
if (status->frame_count > retry_limit) {
|
|
report->status.rates[0].count = retry_limit;
|
|
report->status.rates[1].count = status->frame_count -
|
|
retry_limit;
|
|
|
|
} else {
|
|
report->status.rates[0].count = status->frame_count;
|
|
report->status.rates[1].idx = -1;
|
|
}
|
|
}
|
|
|
|
return frame_success;
|
|
}
|
|
|
|
/* Stop any TX operation on the device (suspend the hardware queues) */
|
|
void b43_tx_suspend(struct b43_wldev *dev)
|
|
{
|
|
if (b43_using_pio_transfers(dev))
|
|
b43_pio_tx_suspend(dev);
|
|
else
|
|
b43_dma_tx_suspend(dev);
|
|
}
|
|
|
|
/* Resume any TX operation on the device (resume the hardware queues) */
|
|
void b43_tx_resume(struct b43_wldev *dev)
|
|
{
|
|
if (b43_using_pio_transfers(dev))
|
|
b43_pio_tx_resume(dev);
|
|
else
|
|
b43_dma_tx_resume(dev);
|
|
}
|