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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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78f18df4b3
ieee80211_free_txskb() needs to be used instead of dev_kfree_skb_any for tx packets passed to the driver from mac80211 Signed-off-by: Felix Fietkau <nbd@openwrt.org> Cc: stable@vger.kernel.org Signed-off-by: John W. Linville <linville@tuxdriver.com>
835 lines
20 KiB
C
835 lines
20 KiB
C
/*
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Broadcom B43 wireless driver
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PIO data transfer
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Copyright (c) 2005-2008 Michael Buesch <m@bues.ch>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
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Boston, MA 02110-1301, USA.
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*/
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#include "b43.h"
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#include "pio.h"
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#include "dma.h"
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#include "main.h"
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#include "xmit.h"
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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static u16 generate_cookie(struct b43_pio_txqueue *q,
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struct b43_pio_txpacket *pack)
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{
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u16 cookie;
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/* Use the upper 4 bits of the cookie as
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* PIO controller ID and store the packet index number
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* in the lower 12 bits.
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* Note that the cookie must never be 0, as this
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* is a special value used in RX path.
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* It can also not be 0xFFFF because that is special
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* for multicast frames.
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*/
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cookie = (((u16)q->index + 1) << 12);
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cookie |= pack->index;
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return cookie;
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}
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static
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struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
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u16 cookie,
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struct b43_pio_txpacket **pack)
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{
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struct b43_pio *pio = &dev->pio;
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struct b43_pio_txqueue *q = NULL;
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unsigned int pack_index;
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switch (cookie & 0xF000) {
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case 0x1000:
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q = pio->tx_queue_AC_BK;
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break;
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case 0x2000:
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q = pio->tx_queue_AC_BE;
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break;
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case 0x3000:
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q = pio->tx_queue_AC_VI;
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break;
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case 0x4000:
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q = pio->tx_queue_AC_VO;
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break;
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case 0x5000:
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q = pio->tx_queue_mcast;
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break;
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}
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if (B43_WARN_ON(!q))
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return NULL;
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pack_index = (cookie & 0x0FFF);
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if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
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return NULL;
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*pack = &q->packets[pack_index];
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return q;
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}
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static u16 index_to_pioqueue_base(struct b43_wldev *dev,
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unsigned int index)
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{
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static const u16 bases[] = {
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B43_MMIO_PIO_BASE0,
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B43_MMIO_PIO_BASE1,
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B43_MMIO_PIO_BASE2,
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B43_MMIO_PIO_BASE3,
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B43_MMIO_PIO_BASE4,
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B43_MMIO_PIO_BASE5,
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B43_MMIO_PIO_BASE6,
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B43_MMIO_PIO_BASE7,
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};
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static const u16 bases_rev11[] = {
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B43_MMIO_PIO11_BASE0,
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B43_MMIO_PIO11_BASE1,
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B43_MMIO_PIO11_BASE2,
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B43_MMIO_PIO11_BASE3,
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B43_MMIO_PIO11_BASE4,
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B43_MMIO_PIO11_BASE5,
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};
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if (dev->dev->core_rev >= 11) {
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B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
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return bases_rev11[index];
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}
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B43_WARN_ON(index >= ARRAY_SIZE(bases));
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return bases[index];
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}
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static u16 pio_txqueue_offset(struct b43_wldev *dev)
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{
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if (dev->dev->core_rev >= 11)
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return 0x18;
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return 0;
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}
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static u16 pio_rxqueue_offset(struct b43_wldev *dev)
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{
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if (dev->dev->core_rev >= 11)
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return 0x38;
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return 8;
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}
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static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
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unsigned int index)
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{
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struct b43_pio_txqueue *q;
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struct b43_pio_txpacket *p;
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unsigned int i;
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q = kzalloc(sizeof(*q), GFP_KERNEL);
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if (!q)
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return NULL;
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q->dev = dev;
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q->rev = dev->dev->core_rev;
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q->mmio_base = index_to_pioqueue_base(dev, index) +
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pio_txqueue_offset(dev);
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q->index = index;
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q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
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if (q->rev >= 8) {
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q->buffer_size = 1920; //FIXME this constant is wrong.
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} else {
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q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
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q->buffer_size -= 80;
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}
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INIT_LIST_HEAD(&q->packets_list);
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for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
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p = &(q->packets[i]);
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INIT_LIST_HEAD(&p->list);
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p->index = i;
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p->queue = q;
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list_add(&p->list, &q->packets_list);
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}
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return q;
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}
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static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
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unsigned int index)
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{
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struct b43_pio_rxqueue *q;
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q = kzalloc(sizeof(*q), GFP_KERNEL);
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if (!q)
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return NULL;
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q->dev = dev;
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q->rev = dev->dev->core_rev;
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q->mmio_base = index_to_pioqueue_base(dev, index) +
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pio_rxqueue_offset(dev);
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/* Enable Direct FIFO RX (PIO) on the engine. */
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b43_dma_direct_fifo_rx(dev, index, 1);
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return q;
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}
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static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
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{
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struct b43_pio_txpacket *pack;
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
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pack = &(q->packets[i]);
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if (pack->skb) {
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ieee80211_free_txskb(q->dev->wl->hw, pack->skb);
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pack->skb = NULL;
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}
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}
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}
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static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
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const char *name)
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{
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if (!q)
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return;
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b43_pio_cancel_tx_packets(q);
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kfree(q);
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}
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static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
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const char *name)
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{
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if (!q)
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return;
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kfree(q);
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}
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#define destroy_queue_tx(pio, queue) do { \
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b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
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(pio)->queue = NULL; \
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} while (0)
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#define destroy_queue_rx(pio, queue) do { \
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b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
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(pio)->queue = NULL; \
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} while (0)
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void b43_pio_free(struct b43_wldev *dev)
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{
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struct b43_pio *pio;
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if (!b43_using_pio_transfers(dev))
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return;
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pio = &dev->pio;
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destroy_queue_rx(pio, rx_queue);
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destroy_queue_tx(pio, tx_queue_mcast);
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destroy_queue_tx(pio, tx_queue_AC_VO);
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destroy_queue_tx(pio, tx_queue_AC_VI);
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destroy_queue_tx(pio, tx_queue_AC_BE);
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destroy_queue_tx(pio, tx_queue_AC_BK);
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}
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int b43_pio_init(struct b43_wldev *dev)
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{
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struct b43_pio *pio = &dev->pio;
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int err = -ENOMEM;
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b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
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& ~B43_MACCTL_BE);
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b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
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pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
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if (!pio->tx_queue_AC_BK)
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goto out;
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pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
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if (!pio->tx_queue_AC_BE)
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goto err_destroy_bk;
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pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
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if (!pio->tx_queue_AC_VI)
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goto err_destroy_be;
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pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
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if (!pio->tx_queue_AC_VO)
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goto err_destroy_vi;
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pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
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if (!pio->tx_queue_mcast)
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goto err_destroy_vo;
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pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
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if (!pio->rx_queue)
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goto err_destroy_mcast;
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b43dbg(dev->wl, "PIO initialized\n");
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err = 0;
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out:
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return err;
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err_destroy_mcast:
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destroy_queue_tx(pio, tx_queue_mcast);
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err_destroy_vo:
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destroy_queue_tx(pio, tx_queue_AC_VO);
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err_destroy_vi:
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destroy_queue_tx(pio, tx_queue_AC_VI);
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err_destroy_be:
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destroy_queue_tx(pio, tx_queue_AC_BE);
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err_destroy_bk:
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destroy_queue_tx(pio, tx_queue_AC_BK);
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return err;
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}
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/* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
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static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
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u8 queue_prio)
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{
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struct b43_pio_txqueue *q;
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if (dev->qos_enabled) {
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/* 0 = highest priority */
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switch (queue_prio) {
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default:
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B43_WARN_ON(1);
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/* fallthrough */
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case 0:
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q = dev->pio.tx_queue_AC_VO;
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break;
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case 1:
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q = dev->pio.tx_queue_AC_VI;
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break;
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case 2:
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q = dev->pio.tx_queue_AC_BE;
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break;
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case 3:
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q = dev->pio.tx_queue_AC_BK;
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break;
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}
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} else
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q = dev->pio.tx_queue_AC_BE;
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return q;
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}
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static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
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u16 ctl,
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const void *_data,
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unsigned int data_len)
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{
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struct b43_wldev *dev = q->dev;
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struct b43_wl *wl = dev->wl;
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const u8 *data = _data;
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ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
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b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
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b43_block_write(dev, data, (data_len & ~1),
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q->mmio_base + B43_PIO_TXDATA,
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sizeof(u16));
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if (data_len & 1) {
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u8 *tail = wl->pio_tailspace;
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BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
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/* Write the last byte. */
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ctl &= ~B43_PIO_TXCTL_WRITEHI;
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b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
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tail[0] = data[data_len - 1];
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tail[1] = 0;
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b43_block_write(dev, tail, 2,
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q->mmio_base + B43_PIO_TXDATA,
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sizeof(u16));
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}
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return ctl;
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}
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static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
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const u8 *hdr, unsigned int hdrlen)
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{
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struct b43_pio_txqueue *q = pack->queue;
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const char *frame = pack->skb->data;
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unsigned int frame_len = pack->skb->len;
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u16 ctl;
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ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
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ctl |= B43_PIO_TXCTL_FREADY;
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ctl &= ~B43_PIO_TXCTL_EOF;
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/* Transfer the header data. */
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ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
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/* Transfer the frame data. */
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ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
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ctl |= B43_PIO_TXCTL_EOF;
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b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
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}
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static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
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u32 ctl,
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const void *_data,
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unsigned int data_len)
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{
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struct b43_wldev *dev = q->dev;
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struct b43_wl *wl = dev->wl;
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const u8 *data = _data;
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ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
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B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
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b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
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b43_block_write(dev, data, (data_len & ~3),
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q->mmio_base + B43_PIO8_TXDATA,
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sizeof(u32));
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if (data_len & 3) {
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u8 *tail = wl->pio_tailspace;
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BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
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memset(tail, 0, 4);
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/* Write the last few bytes. */
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ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
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B43_PIO8_TXCTL_24_31);
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switch (data_len & 3) {
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case 3:
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ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
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tail[0] = data[data_len - 3];
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tail[1] = data[data_len - 2];
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tail[2] = data[data_len - 1];
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break;
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case 2:
|
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ctl |= B43_PIO8_TXCTL_8_15;
|
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tail[0] = data[data_len - 2];
|
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tail[1] = data[data_len - 1];
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break;
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case 1:
|
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tail[0] = data[data_len - 1];
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break;
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}
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b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
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b43_block_write(dev, tail, 4,
|
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q->mmio_base + B43_PIO8_TXDATA,
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sizeof(u32));
|
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}
|
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|
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return ctl;
|
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}
|
|
|
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static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
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const u8 *hdr, unsigned int hdrlen)
|
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{
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struct b43_pio_txqueue *q = pack->queue;
|
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const char *frame = pack->skb->data;
|
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unsigned int frame_len = pack->skb->len;
|
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u32 ctl;
|
|
|
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ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
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ctl |= B43_PIO8_TXCTL_FREADY;
|
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ctl &= ~B43_PIO8_TXCTL_EOF;
|
|
|
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/* Transfer the header data. */
|
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ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
|
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/* Transfer the frame data. */
|
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ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
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|
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ctl |= B43_PIO8_TXCTL_EOF;
|
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b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
|
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}
|
|
|
|
static int pio_tx_frame(struct b43_pio_txqueue *q,
|
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struct sk_buff *skb)
|
|
{
|
|
struct b43_wldev *dev = q->dev;
|
|
struct b43_wl *wl = dev->wl;
|
|
struct b43_pio_txpacket *pack;
|
|
u16 cookie;
|
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int err;
|
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unsigned int hdrlen;
|
|
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
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struct b43_txhdr *txhdr = (struct b43_txhdr *)wl->pio_scratchspace;
|
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|
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B43_WARN_ON(list_empty(&q->packets_list));
|
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pack = list_entry(q->packets_list.next,
|
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struct b43_pio_txpacket, list);
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|
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cookie = generate_cookie(q, pack);
|
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hdrlen = b43_txhdr_size(dev);
|
|
BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(struct b43_txhdr));
|
|
B43_WARN_ON(sizeof(wl->pio_scratchspace) < hdrlen);
|
|
err = b43_generate_txhdr(dev, (u8 *)txhdr, skb,
|
|
info, cookie);
|
|
if (err)
|
|
return err;
|
|
|
|
if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
|
|
/* Tell the firmware about the cookie of the last
|
|
* mcast frame, so it can clear the more-data bit in it. */
|
|
b43_shm_write16(dev, B43_SHM_SHARED,
|
|
B43_SHM_SH_MCASTCOOKIE, cookie);
|
|
}
|
|
|
|
pack->skb = skb;
|
|
if (q->rev >= 8)
|
|
pio_tx_frame_4byte_queue(pack, (const u8 *)txhdr, hdrlen);
|
|
else
|
|
pio_tx_frame_2byte_queue(pack, (const u8 *)txhdr, hdrlen);
|
|
|
|
/* Remove it from the list of available packet slots.
|
|
* It will be put back when we receive the status report. */
|
|
list_del(&pack->list);
|
|
|
|
/* Update the queue statistics. */
|
|
q->buffer_used += roundup(skb->len + hdrlen, 4);
|
|
q->free_packet_slots -= 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
|
|
{
|
|
struct b43_pio_txqueue *q;
|
|
struct ieee80211_hdr *hdr;
|
|
unsigned int hdrlen, total_len;
|
|
int err = 0;
|
|
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
|
|
|
hdr = (struct ieee80211_hdr *)skb->data;
|
|
|
|
if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
|
|
/* The multicast queue will be sent after the DTIM. */
|
|
q = dev->pio.tx_queue_mcast;
|
|
/* Set the frame More-Data bit. Ucode will clear it
|
|
* for us on the last frame. */
|
|
hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
|
|
} else {
|
|
/* Decide by priority where to put this frame. */
|
|
q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
|
|
}
|
|
|
|
hdrlen = b43_txhdr_size(dev);
|
|
total_len = roundup(skb->len + hdrlen, 4);
|
|
|
|
if (unlikely(total_len > q->buffer_size)) {
|
|
err = -ENOBUFS;
|
|
b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
|
|
goto out;
|
|
}
|
|
if (unlikely(q->free_packet_slots == 0)) {
|
|
err = -ENOBUFS;
|
|
b43warn(dev->wl, "PIO: TX packet overflow.\n");
|
|
goto out;
|
|
}
|
|
B43_WARN_ON(q->buffer_used > q->buffer_size);
|
|
|
|
if (total_len > (q->buffer_size - q->buffer_used)) {
|
|
/* Not enough memory on the queue. */
|
|
err = -EBUSY;
|
|
ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
|
|
q->stopped = true;
|
|
goto out;
|
|
}
|
|
|
|
/* Assign the queue number to the ring (if not already done before)
|
|
* so TX status handling can use it. The mac80211-queue to b43-queue
|
|
* mapping is static, so we don't need to store it per frame. */
|
|
q->queue_prio = skb_get_queue_mapping(skb);
|
|
|
|
err = pio_tx_frame(q, skb);
|
|
if (unlikely(err == -ENOKEY)) {
|
|
/* Drop this packet, as we don't have the encryption key
|
|
* anymore and must not transmit it unencrypted. */
|
|
ieee80211_free_txskb(dev->wl->hw, skb);
|
|
err = 0;
|
|
goto out;
|
|
}
|
|
if (unlikely(err)) {
|
|
b43err(dev->wl, "PIO transmission failure\n");
|
|
goto out;
|
|
}
|
|
|
|
B43_WARN_ON(q->buffer_used > q->buffer_size);
|
|
if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
|
|
(q->free_packet_slots == 0)) {
|
|
/* The queue is full. */
|
|
ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
|
|
q->stopped = true;
|
|
}
|
|
|
|
out:
|
|
return err;
|
|
}
|
|
|
|
void b43_pio_handle_txstatus(struct b43_wldev *dev,
|
|
const struct b43_txstatus *status)
|
|
{
|
|
struct b43_pio_txqueue *q;
|
|
struct b43_pio_txpacket *pack = NULL;
|
|
unsigned int total_len;
|
|
struct ieee80211_tx_info *info;
|
|
|
|
q = parse_cookie(dev, status->cookie, &pack);
|
|
if (unlikely(!q))
|
|
return;
|
|
B43_WARN_ON(!pack);
|
|
|
|
info = IEEE80211_SKB_CB(pack->skb);
|
|
|
|
b43_fill_txstatus_report(dev, info, status);
|
|
|
|
total_len = pack->skb->len + b43_txhdr_size(dev);
|
|
total_len = roundup(total_len, 4);
|
|
q->buffer_used -= total_len;
|
|
q->free_packet_slots += 1;
|
|
|
|
ieee80211_tx_status(dev->wl->hw, pack->skb);
|
|
pack->skb = NULL;
|
|
list_add(&pack->list, &q->packets_list);
|
|
|
|
if (q->stopped) {
|
|
ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
|
|
q->stopped = false;
|
|
}
|
|
}
|
|
|
|
/* Returns whether we should fetch another frame. */
|
|
static bool pio_rx_frame(struct b43_pio_rxqueue *q)
|
|
{
|
|
struct b43_wldev *dev = q->dev;
|
|
struct b43_wl *wl = dev->wl;
|
|
u16 len;
|
|
u32 macstat = 0;
|
|
unsigned int i, padding;
|
|
struct sk_buff *skb;
|
|
const char *err_msg = NULL;
|
|
struct b43_rxhdr_fw4 *rxhdr =
|
|
(struct b43_rxhdr_fw4 *)wl->pio_scratchspace;
|
|
size_t rxhdr_size = sizeof(*rxhdr);
|
|
|
|
BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(*rxhdr));
|
|
switch (dev->fw.hdr_format) {
|
|
case B43_FW_HDR_410:
|
|
case B43_FW_HDR_351:
|
|
rxhdr_size -= sizeof(rxhdr->format_598) -
|
|
sizeof(rxhdr->format_351);
|
|
break;
|
|
case B43_FW_HDR_598:
|
|
break;
|
|
}
|
|
memset(rxhdr, 0, rxhdr_size);
|
|
|
|
/* Check if we have data and wait for it to get ready. */
|
|
if (q->rev >= 8) {
|
|
u32 ctl;
|
|
|
|
ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
|
|
if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
|
|
return 0;
|
|
b43_piorx_write32(q, B43_PIO8_RXCTL,
|
|
B43_PIO8_RXCTL_FRAMERDY);
|
|
for (i = 0; i < 10; i++) {
|
|
ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
|
|
if (ctl & B43_PIO8_RXCTL_DATARDY)
|
|
goto data_ready;
|
|
udelay(10);
|
|
}
|
|
} else {
|
|
u16 ctl;
|
|
|
|
ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
|
|
if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
|
|
return 0;
|
|
b43_piorx_write16(q, B43_PIO_RXCTL,
|
|
B43_PIO_RXCTL_FRAMERDY);
|
|
for (i = 0; i < 10; i++) {
|
|
ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
|
|
if (ctl & B43_PIO_RXCTL_DATARDY)
|
|
goto data_ready;
|
|
udelay(10);
|
|
}
|
|
}
|
|
b43dbg(q->dev->wl, "PIO RX timed out\n");
|
|
return 1;
|
|
data_ready:
|
|
|
|
/* Get the preamble (RX header) */
|
|
if (q->rev >= 8) {
|
|
b43_block_read(dev, rxhdr, rxhdr_size,
|
|
q->mmio_base + B43_PIO8_RXDATA,
|
|
sizeof(u32));
|
|
} else {
|
|
b43_block_read(dev, rxhdr, rxhdr_size,
|
|
q->mmio_base + B43_PIO_RXDATA,
|
|
sizeof(u16));
|
|
}
|
|
/* Sanity checks. */
|
|
len = le16_to_cpu(rxhdr->frame_len);
|
|
if (unlikely(len > 0x700)) {
|
|
err_msg = "len > 0x700";
|
|
goto rx_error;
|
|
}
|
|
if (unlikely(len == 0)) {
|
|
err_msg = "len == 0";
|
|
goto rx_error;
|
|
}
|
|
|
|
switch (dev->fw.hdr_format) {
|
|
case B43_FW_HDR_598:
|
|
macstat = le32_to_cpu(rxhdr->format_598.mac_status);
|
|
break;
|
|
case B43_FW_HDR_410:
|
|
case B43_FW_HDR_351:
|
|
macstat = le32_to_cpu(rxhdr->format_351.mac_status);
|
|
break;
|
|
}
|
|
if (macstat & B43_RX_MAC_FCSERR) {
|
|
if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
|
|
/* Drop frames with failed FCS. */
|
|
err_msg = "Frame FCS error";
|
|
goto rx_error;
|
|
}
|
|
}
|
|
|
|
/* We always pad 2 bytes, as that's what upstream code expects
|
|
* due to the RX-header being 30 bytes. In case the frame is
|
|
* unaligned, we pad another 2 bytes. */
|
|
padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
|
|
skb = dev_alloc_skb(len + padding + 2);
|
|
if (unlikely(!skb)) {
|
|
err_msg = "Out of memory";
|
|
goto rx_error;
|
|
}
|
|
skb_reserve(skb, 2);
|
|
skb_put(skb, len + padding);
|
|
if (q->rev >= 8) {
|
|
b43_block_read(dev, skb->data + padding, (len & ~3),
|
|
q->mmio_base + B43_PIO8_RXDATA,
|
|
sizeof(u32));
|
|
if (len & 3) {
|
|
u8 *tail = wl->pio_tailspace;
|
|
BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
|
|
|
|
/* Read the last few bytes. */
|
|
b43_block_read(dev, tail, 4,
|
|
q->mmio_base + B43_PIO8_RXDATA,
|
|
sizeof(u32));
|
|
switch (len & 3) {
|
|
case 3:
|
|
skb->data[len + padding - 3] = tail[0];
|
|
skb->data[len + padding - 2] = tail[1];
|
|
skb->data[len + padding - 1] = tail[2];
|
|
break;
|
|
case 2:
|
|
skb->data[len + padding - 2] = tail[0];
|
|
skb->data[len + padding - 1] = tail[1];
|
|
break;
|
|
case 1:
|
|
skb->data[len + padding - 1] = tail[0];
|
|
break;
|
|
}
|
|
}
|
|
} else {
|
|
b43_block_read(dev, skb->data + padding, (len & ~1),
|
|
q->mmio_base + B43_PIO_RXDATA,
|
|
sizeof(u16));
|
|
if (len & 1) {
|
|
u8 *tail = wl->pio_tailspace;
|
|
BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
|
|
|
|
/* Read the last byte. */
|
|
b43_block_read(dev, tail, 2,
|
|
q->mmio_base + B43_PIO_RXDATA,
|
|
sizeof(u16));
|
|
skb->data[len + padding - 1] = tail[0];
|
|
}
|
|
}
|
|
|
|
b43_rx(q->dev, skb, rxhdr);
|
|
|
|
return 1;
|
|
|
|
rx_error:
|
|
if (err_msg)
|
|
b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
|
|
if (q->rev >= 8)
|
|
b43_piorx_write32(q, B43_PIO8_RXCTL, B43_PIO8_RXCTL_DATARDY);
|
|
else
|
|
b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
|
|
|
|
return 1;
|
|
}
|
|
|
|
void b43_pio_rx(struct b43_pio_rxqueue *q)
|
|
{
|
|
unsigned int count = 0;
|
|
bool stop;
|
|
|
|
while (1) {
|
|
stop = (pio_rx_frame(q) == 0);
|
|
if (stop)
|
|
break;
|
|
cond_resched();
|
|
if (WARN_ON_ONCE(++count > 10000))
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
|
|
{
|
|
if (q->rev >= 8) {
|
|
b43_piotx_write32(q, B43_PIO8_TXCTL,
|
|
b43_piotx_read32(q, B43_PIO8_TXCTL)
|
|
| B43_PIO8_TXCTL_SUSPREQ);
|
|
} else {
|
|
b43_piotx_write16(q, B43_PIO_TXCTL,
|
|
b43_piotx_read16(q, B43_PIO_TXCTL)
|
|
| B43_PIO_TXCTL_SUSPREQ);
|
|
}
|
|
}
|
|
|
|
static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
|
|
{
|
|
if (q->rev >= 8) {
|
|
b43_piotx_write32(q, B43_PIO8_TXCTL,
|
|
b43_piotx_read32(q, B43_PIO8_TXCTL)
|
|
& ~B43_PIO8_TXCTL_SUSPREQ);
|
|
} else {
|
|
b43_piotx_write16(q, B43_PIO_TXCTL,
|
|
b43_piotx_read16(q, B43_PIO_TXCTL)
|
|
& ~B43_PIO_TXCTL_SUSPREQ);
|
|
}
|
|
}
|
|
|
|
void b43_pio_tx_suspend(struct b43_wldev *dev)
|
|
{
|
|
b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
|
|
b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
|
|
b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
|
|
b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
|
|
b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
|
|
b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
|
|
}
|
|
|
|
void b43_pio_tx_resume(struct b43_wldev *dev)
|
|
{
|
|
b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
|
|
b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
|
|
b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
|
|
b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
|
|
b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
|
|
b43_power_saving_ctl_bits(dev, 0);
|
|
}
|