AuxXxilium/linux_dsm_epyc7002
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linux_dsm_epyc7002/include/linux/mlx5
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Saeed Mahameed fc11fbf9a7 net/mlx5e: Add HW cacheline start padding 
Enable HW cacheline start padding and align RX WQE size to cacheline
while considering HW start padding. Also, fix dma_unmap call to use
the correct SKB data buffer size.

Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-11 15:55:25 -07:00
..
cmd.h net/mlx5_core: Fix Mellanox copyright note 2015-04-02 16:33:42 -04:00
cq.h net/mlx5_core: Modify CQ moderation parameters 2015-05-30 18:23:59 -07:00
device.h net/mlx5e: Add HW cacheline start padding 2015-06-11 15:55:25 -07:00
doorbell.h net/mlx5_core: Fix Mellanox copyright note 2015-04-02 16:33:42 -04:00
driver.h net/mlx5e: Fix HW MTU settings 2015-06-11 15:55:25 -07:00
flow_table.h net/mlx5: Ethernet resource handling files 2015-05-30 18:24:39 -07:00
mlx5_ifc.h net/mlx5_core: Get vendor-id using the query adapter command 2015-06-04 16:41:01 -07:00
qp.h net/mlx5_core: HW data structs/types definitions cleanup 2015-05-30 18:23:11 -07:00
srq.h net/mlx5_core: Fix Mellanox copyright note 2015-04-02 16:33:42 -04:00
vport.h net/mlx5_core: Fix static checker warnings around system guid query flow 2015-06-07 20:11:17 -07:00