Andre Przywara 7ef8aa72ab x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit ... The AMD SSE5 feature set as-it has been replaced by some extensions to the AVX instruction set. Thus the bit formerly advertised as SSE5 is re-used for one of these extensions (XOP). Although this changes the /proc/cpuinfo output, it is not user visible, as there are no CPUs (yet) having this feature. To avoid confusion this should be added to the stable series, too. Cc: stable@kernel.org [.32.x .34.x, .35.x] Signed-off-by: Andre Przywara <andre.przywara@amd.com> LKML-Reference: <1283778860-26843-2-git-send-email-andre.przywara@amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>		2010-09-08 13:32:55 -07:00
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asm	x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit	2010-09-08 13:32:55 -07:00