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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5c6201e60a
I made a mistake as for naming for this block. The MIO block is not implemented for these 3 SoCs in the first place. The current naming will be a trouble if an SoC with both MIO and SD-ctrl blocks appear in the future. This driver has just been merged in the previous merge window. Rename it before the release. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
102 lines
3.0 KiB
C
102 lines
3.0 KiB
C
/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "clk-uniphier.h"
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#define UNIPHIER_MIO_CLK_SD_FIXED \
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UNIPHIER_CLK_FACTOR("sd-44m", -1, "sd-133m", 1, 3), \
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UNIPHIER_CLK_FACTOR("sd-33m", -1, "sd-200m", 1, 6), \
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UNIPHIER_CLK_FACTOR("sd-50m", -1, "sd-200m", 1, 4), \
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UNIPHIER_CLK_FACTOR("sd-67m", -1, "sd-200m", 1, 3), \
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UNIPHIER_CLK_FACTOR("sd-100m", -1, "sd-200m", 1, 2), \
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UNIPHIER_CLK_FACTOR("sd-40m", -1, "sd-200m", 1, 5), \
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UNIPHIER_CLK_FACTOR("sd-25m", -1, "sd-200m", 1, 8), \
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UNIPHIER_CLK_FACTOR("sd-22m", -1, "sd-133m", 1, 6)
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#define UNIPHIER_MIO_CLK_SD(_idx, ch) \
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{ \
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.name = "sd" #ch "-sel", \
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.type = UNIPHIER_CLK_TYPE_MUX, \
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.idx = -1, \
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.data.mux = { \
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.parent_names = { \
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"sd-44m", \
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"sd-33m", \
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"sd-50m", \
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"sd-67m", \
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"sd-100m", \
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"sd-40m", \
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"sd-25m", \
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"sd-22m", \
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}, \
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.num_parents = 8, \
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.reg = 0x30 + 0x200 * (ch), \
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.masks = { \
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0x00031000, \
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0x00031000, \
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0x00031000, \
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0x00031000, \
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0x00001300, \
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0x00001300, \
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0x00001300, \
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0x00001300, \
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}, \
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.vals = { \
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0x00000000, \
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0x00010000, \
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0x00020000, \
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0x00030000, \
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0x00001000, \
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0x00001100, \
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0x00001200, \
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0x00001300, \
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}, \
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}, \
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}, \
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UNIPHIER_CLK_GATE("sd" #ch, (_idx), "sd" #ch "-sel", 0x20 + 0x200 * (ch), 8)
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#define UNIPHIER_MIO_CLK_USB2(idx, ch) \
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UNIPHIER_CLK_GATE("usb2" #ch, (idx), "usb2", 0x20 + 0x200 * (ch), 28)
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#define UNIPHIER_MIO_CLK_USB2_PHY(idx, ch) \
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UNIPHIER_CLK_GATE("usb2" #ch "-phy", (idx), "usb2", 0x20 + 0x200 * (ch), 29)
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#define UNIPHIER_MIO_CLK_DMAC(idx) \
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UNIPHIER_CLK_GATE("miodmac", (idx), "stdmac", 0x20, 25)
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const struct uniphier_clk_data uniphier_sld3_mio_clk_data[] = {
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UNIPHIER_MIO_CLK_SD_FIXED,
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UNIPHIER_MIO_CLK_SD(0, 0),
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UNIPHIER_MIO_CLK_SD(1, 1),
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UNIPHIER_MIO_CLK_SD(2, 2),
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UNIPHIER_MIO_CLK_DMAC(7),
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UNIPHIER_MIO_CLK_USB2(8, 0),
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UNIPHIER_MIO_CLK_USB2(9, 1),
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UNIPHIER_MIO_CLK_USB2(10, 2),
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UNIPHIER_MIO_CLK_USB2(11, 3),
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UNIPHIER_MIO_CLK_USB2_PHY(12, 0),
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UNIPHIER_MIO_CLK_USB2_PHY(13, 1),
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UNIPHIER_MIO_CLK_USB2_PHY(14, 2),
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UNIPHIER_MIO_CLK_USB2_PHY(15, 3),
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{ /* sentinel */ }
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};
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const struct uniphier_clk_data uniphier_pro5_sd_clk_data[] = {
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UNIPHIER_MIO_CLK_SD_FIXED,
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UNIPHIER_MIO_CLK_SD(0, 0),
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UNIPHIER_MIO_CLK_SD(1, 1),
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{ /* sentinel */ }
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};
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