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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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fd89a13792
This patch fixes machine crashes which occur when heavily exercising the
CPU hotplug codepaths on a 32-bit kernel. These crashes are caused by
AMD Erratum 383 and result in a fatal machine check exception. Here's
the scenario:
1. On 32-bit, the swapper_pg_dir page table is used as the initial page
table for booting a secondary CPU.
2. To make this work, swapper_pg_dir needs a direct mapping of physical
memory in it (the low mappings). By adding those low, large page (2M)
mappings (PAE kernel), we create the necessary conditions for Erratum
383 to occur.
3. Other CPUs which do not participate in the off- and onlining game may
use swapper_pg_dir while the low mappings are present (when leave_mm is
called). For all steps below, the CPU referred to is a CPU that is using
swapper_pg_dir, and not the CPU which is being onlined.
4. The presence of the low mappings in swapper_pg_dir can result
in TLB entries for addresses below __PAGE_OFFSET to be established
speculatively. These TLB entries are marked global and large.
5. When the CPU with such TLB entry switches to another page table, this
TLB entry remains because it is global.
6. The process then generates an access to an address covered by the
above TLB entry but there is a permission mismatch - the TLB entry
covers a large global page not accessible to userspace.
7. Due to this permission mismatch a new 4kb, user TLB entry gets
established. Further, Erratum 383 provides for a small window of time
where both TLB entries are present. This results in an uncorrectable
machine check exception signalling a TLB multimatch which panics the
machine.
There are two ways to fix this issue:
1. Always do a global TLB flush when a new cr3 is loaded and the
old page table was swapper_pg_dir. I consider this a hack hard
to understand and with performance implications
2. Do not use swapper_pg_dir to boot secondary CPUs like 64-bit
does.
This patch implements solution 2. It introduces a trampoline_pg_dir
which has the same layout as swapper_pg_dir with low_mappings. This page
table is used as the initial page table of the booting CPU. Later in the
bringup process, it switches to swapper_pg_dir and does a global TLB
flush. This fixes the crashes in our test cases.
-v2: switch to swapper_pg_dir right after entering start_secondary() so
that we are able to access percpu data which might not be mapped in the
trampoline page table.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
LKML-Reference: <20100816123833.GB28147@aftab>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
732 lines
17 KiB
ArmAsm
732 lines
17 KiB
ArmAsm
/*
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*
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* Copyright (C) 1991, 1992 Linus Torvalds
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*
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* Enhanced CPU detection and feature setting code by Mike Jagdis
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* and Martin Mares, November 1997.
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*/
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.text
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#include <linux/threads.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/page_types.h>
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#include <asm/pgtable_types.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <asm/asm-offsets.h>
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#include <asm/setup.h>
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#include <asm/processor-flags.h>
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#include <asm/msr-index.h>
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#include <asm/cpufeature.h>
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#include <asm/percpu.h>
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/* Physical address */
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#define pa(X) ((X) - __PAGE_OFFSET)
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/*
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* References to members of the new_cpu_data structure.
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*/
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#define X86 new_cpu_data+CPUINFO_x86
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#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
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#define X86_MODEL new_cpu_data+CPUINFO_x86_model
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#define X86_MASK new_cpu_data+CPUINFO_x86_mask
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#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
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#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
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#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
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#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
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/*
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* This is how much memory in addition to the memory covered up to
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* and including _end we need mapped initially.
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* We need:
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* (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
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* (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
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*
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* Modulo rounding, each megabyte assigned here requires a kilobyte of
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* memory, which is currently unreclaimed.
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*
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* This should be a multiple of a page.
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*
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* KERNEL_IMAGE_SIZE should be greater than pa(_end)
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* and small than max_low_pfn, otherwise will waste some page table entries
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*/
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#if PTRS_PER_PMD > 1
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#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
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#else
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#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
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#endif
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/* Enough space to fit pagetables for the low memory linear map */
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MAPPING_BEYOND_END = \
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PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT
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/*
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* Worst-case size of the kernel mapping we need to make:
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* the worst-case size of the kernel itself, plus the extra we need
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* to map for the linear map.
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*/
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KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT
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INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
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RESERVE_BRK(pagetables, INIT_MAP_SIZE)
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/*
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* 32-bit kernel entrypoint; only used by the boot CPU. On entry,
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* %esi points to the real-mode code as a 32-bit pointer.
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* CS and DS must be 4 GB flat segments, but we don't depend on
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* any particular GDT layout, because we load our own as soon as we
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* can.
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*/
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__HEAD
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ENTRY(startup_32)
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/* test KEEP_SEGMENTS flag to see if the bootloader is asking
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us to not reload segments */
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testb $(1<<6), BP_loadflags(%esi)
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jnz 2f
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/*
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* Set segments to known values.
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*/
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lgdt pa(boot_gdt_descr)
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movl $(__BOOT_DS),%eax
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movl %eax,%ds
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movl %eax,%es
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movl %eax,%fs
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movl %eax,%gs
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2:
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/*
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* Clear BSS first so that there are no surprises...
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*/
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cld
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xorl %eax,%eax
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movl $pa(__bss_start),%edi
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movl $pa(__bss_stop),%ecx
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subl %edi,%ecx
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shrl $2,%ecx
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rep ; stosl
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/*
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* Copy bootup parameters out of the way.
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* Note: %esi still has the pointer to the real-mode data.
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* With the kexec as boot loader, parameter segment might be loaded beyond
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* kernel image and might not even be addressable by early boot page tables.
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* (kexec on panic case). Hence copy out the parameters before initializing
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* page tables.
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*/
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movl $pa(boot_params),%edi
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movl $(PARAM_SIZE/4),%ecx
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cld
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rep
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movsl
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movl pa(boot_params) + NEW_CL_POINTER,%esi
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andl %esi,%esi
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jz 1f # No comand line
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movl $pa(boot_command_line),%edi
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movl $(COMMAND_LINE_SIZE/4),%ecx
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rep
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movsl
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1:
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#ifdef CONFIG_OLPC_OPENFIRMWARE
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/* save OFW's pgdir table for later use when calling into OFW */
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movl %cr3, %eax
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movl %eax, pa(olpc_ofw_pgd)
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#endif
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#ifdef CONFIG_PARAVIRT
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/* This is can only trip for a broken bootloader... */
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cmpw $0x207, pa(boot_params + BP_version)
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jb default_entry
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/* Paravirt-compatible boot parameters. Look to see what architecture
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we're booting under. */
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movl pa(boot_params + BP_hardware_subarch), %eax
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cmpl $num_subarch_entries, %eax
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jae bad_subarch
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movl pa(subarch_entries)(,%eax,4), %eax
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subl $__PAGE_OFFSET, %eax
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jmp *%eax
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bad_subarch:
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WEAK(lguest_entry)
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WEAK(xen_entry)
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/* Unknown implementation; there's really
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nothing we can do at this point. */
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ud2a
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__INITDATA
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subarch_entries:
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.long default_entry /* normal x86/PC */
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.long lguest_entry /* lguest hypervisor */
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.long xen_entry /* Xen hypervisor */
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.long default_entry /* Moorestown MID */
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num_subarch_entries = (. - subarch_entries) / 4
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.previous
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#endif /* CONFIG_PARAVIRT */
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/*
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* Initialize page tables. This creates a PDE and a set of page
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* tables, which are located immediately beyond __brk_base. The variable
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* _brk_end is set up to point to the first "safe" location.
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* Mappings are created both at virtual address 0 (identity mapping)
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* and PAGE_OFFSET for up to _end.
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*
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* Note that the stack is not yet set up!
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*/
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default_entry:
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#ifdef CONFIG_X86_PAE
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/*
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* In PAE mode swapper_pg_dir is statically defined to contain enough
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* entries to cover the VMSPLIT option (that is the top 1, 2 or 3
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* entries). The identity mapping is handled by pointing two PGD
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* entries to the first kernel PMD.
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*
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* Note the upper half of each PMD or PTE are always zero at
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* this stage.
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*/
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#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
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xorl %ebx,%ebx /* %ebx is kept at zero */
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movl $pa(__brk_base), %edi
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movl $pa(swapper_pg_pmd), %edx
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movl $PTE_IDENT_ATTR, %eax
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10:
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leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
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movl %ecx,(%edx) /* Store PMD entry */
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/* Upper half already zero */
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addl $8,%edx
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movl $512,%ecx
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11:
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stosl
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xchgl %eax,%ebx
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stosl
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xchgl %eax,%ebx
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addl $0x1000,%eax
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loop 11b
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/*
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* End condition: we must map up to the end + MAPPING_BEYOND_END.
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*/
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movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
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cmpl %ebp,%eax
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jb 10b
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1:
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addl $__PAGE_OFFSET, %edi
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movl %edi, pa(_brk_end)
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shrl $12, %eax
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movl %eax, pa(max_pfn_mapped)
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/* Do early initialization of the fixmap area */
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movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
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movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
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#else /* Not PAE */
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page_pde_offset = (__PAGE_OFFSET >> 20);
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movl $pa(__brk_base), %edi
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movl $pa(swapper_pg_dir), %edx
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movl $PTE_IDENT_ATTR, %eax
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10:
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leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
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movl %ecx,(%edx) /* Store identity PDE entry */
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movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
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addl $4,%edx
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movl $1024, %ecx
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11:
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stosl
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addl $0x1000,%eax
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loop 11b
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/*
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* End condition: we must map up to the end + MAPPING_BEYOND_END.
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*/
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movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
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cmpl %ebp,%eax
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jb 10b
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addl $__PAGE_OFFSET, %edi
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movl %edi, pa(_brk_end)
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shrl $12, %eax
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movl %eax, pa(max_pfn_mapped)
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/* Do early initialization of the fixmap area */
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movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
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movl %eax,pa(swapper_pg_dir+0xffc)
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#endif
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jmp 3f
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/*
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* Non-boot CPU entry point; entered from trampoline.S
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* We can't lgdt here, because lgdt itself uses a data segment, but
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* we know the trampoline has already loaded the boot_gdt for us.
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*
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* If cpu hotplug is not supported then this code can go in init section
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* which will be freed later
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*/
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__CPUINIT
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#ifdef CONFIG_SMP
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ENTRY(startup_32_smp)
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cld
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movl $(__BOOT_DS),%eax
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movl %eax,%ds
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movl %eax,%es
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movl %eax,%fs
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movl %eax,%gs
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#endif /* CONFIG_SMP */
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3:
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/*
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* New page tables may be in 4Mbyte page mode and may
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* be using the global pages.
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*
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* NOTE! If we are on a 486 we may have no cr4 at all!
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* So we do not try to touch it unless we really have
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* some bits in it to set. This won't work if the BSP
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* implements cr4 but this AP does not -- very unlikely
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* but be warned! The same applies to the pse feature
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* if not equally supported. --macro
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*
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* NOTE! We have to correct for the fact that we're
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* not yet offset PAGE_OFFSET..
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*/
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#define cr4_bits pa(mmu_cr4_features)
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movl cr4_bits,%edx
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andl %edx,%edx
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jz 6f
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movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
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orl %edx,%eax
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movl %eax,%cr4
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testb $X86_CR4_PAE, %al # check if PAE is enabled
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jz 6f
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/* Check if extended functions are implemented */
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movl $0x80000000, %eax
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cpuid
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/* Value must be in the range 0x80000001 to 0x8000ffff */
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subl $0x80000001, %eax
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cmpl $(0x8000ffff-0x80000001), %eax
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ja 6f
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mov $0x80000001, %eax
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cpuid
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/* Execute Disable bit supported? */
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btl $(X86_FEATURE_NX & 31), %edx
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jnc 6f
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/* Setup EFER (Extended Feature Enable Register) */
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movl $MSR_EFER, %ecx
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rdmsr
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btsl $_EFER_NX, %eax
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/* Make changes effective */
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wrmsr
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6:
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/*
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* Enable paging
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*/
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movl pa(initial_page_table), %eax
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movl %eax,%cr3 /* set the page table pointer.. */
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movl %cr0,%eax
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orl $X86_CR0_PG,%eax
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movl %eax,%cr0 /* ..and set paging (PG) bit */
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ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
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1:
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/* Set up the stack pointer */
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lss stack_start,%esp
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/*
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* Initialize eflags. Some BIOS's leave bits like NT set. This would
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* confuse the debugger if this code is traced.
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* XXX - best to initialize before switching to protected mode.
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*/
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pushl $0
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popfl
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#ifdef CONFIG_SMP
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cmpb $0, ready
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jz 1f /* Initial CPU cleans BSS */
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jmp checkCPUtype
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1:
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#endif /* CONFIG_SMP */
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/*
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* start system 32-bit setup. We need to re-do some of the things done
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* in 16-bit mode for the "real" operations.
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*/
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call setup_idt
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checkCPUtype:
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movl $-1,X86_CPUID # -1 for no CPUID initially
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/* check if it is 486 or 386. */
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/*
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* XXX - this does a lot of unnecessary setup. Alignment checks don't
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* apply at our cpl of 0 and the stack ought to be aligned already, and
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* we don't need to preserve eflags.
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*/
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movb $3,X86 # at least 386
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pushfl # push EFLAGS
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popl %eax # get EFLAGS
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movl %eax,%ecx # save original EFLAGS
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xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
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pushl %eax # copy to EFLAGS
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popfl # set EFLAGS
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pushfl # get new EFLAGS
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popl %eax # put it in eax
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xorl %ecx,%eax # change in flags
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pushl %ecx # restore original EFLAGS
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popfl
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testl $0x40000,%eax # check if AC bit changed
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je is386
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movb $4,X86 # at least 486
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testl $0x200000,%eax # check if ID bit changed
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je is486
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/* get vendor info */
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xorl %eax,%eax # call CPUID with 0 -> return vendor ID
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cpuid
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movl %eax,X86_CPUID # save CPUID level
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movl %ebx,X86_VENDOR_ID # lo 4 chars
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movl %edx,X86_VENDOR_ID+4 # next 4 chars
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movl %ecx,X86_VENDOR_ID+8 # last 4 chars
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orl %eax,%eax # do we have processor info as well?
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je is486
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movl $1,%eax # Use the CPUID instruction to get CPU type
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cpuid
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movb %al,%cl # save reg for future use
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andb $0x0f,%ah # mask processor family
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movb %ah,X86
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andb $0xf0,%al # mask model
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shrb $4,%al
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movb %al,X86_MODEL
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andb $0x0f,%cl # mask mask revision
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movb %cl,X86_MASK
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movl %edx,X86_CAPABILITY
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is486: movl $0x50022,%ecx # set AM, WP, NE and MP
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jmp 2f
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is386: movl $2,%ecx # set MP
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2: movl %cr0,%eax
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andl $0x80000011,%eax # Save PG,PE,ET
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orl %ecx,%eax
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movl %eax,%cr0
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call check_x87
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lgdt early_gdt_descr
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lidt idt_descr
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ljmp $(__KERNEL_CS),$1f
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1: movl $(__KERNEL_DS),%eax # reload all the segment registers
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movl %eax,%ss # after changing gdt.
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movl $(__USER_DS),%eax # DS/ES contains default USER segment
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movl %eax,%ds
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movl %eax,%es
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movl $(__KERNEL_PERCPU), %eax
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movl %eax,%fs # set this cpu's percpu
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#ifdef CONFIG_CC_STACKPROTECTOR
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/*
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* The linker can't handle this by relocation. Manually set
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* base address in stack canary segment descriptor.
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*/
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cmpb $0,ready
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jne 1f
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movl $gdt_page,%eax
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movl $stack_canary,%ecx
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movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
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shrl $16, %ecx
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movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
|
|
movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
|
|
1:
|
|
#endif
|
|
movl $(__KERNEL_STACK_CANARY),%eax
|
|
movl %eax,%gs
|
|
|
|
xorl %eax,%eax # Clear LDT
|
|
lldt %ax
|
|
|
|
cld # gcc2 wants the direction flag cleared at all times
|
|
pushl $0 # fake return address for unwinder
|
|
#ifdef CONFIG_SMP
|
|
movb ready, %cl
|
|
movb $1, ready
|
|
cmpb $0,%cl # the first CPU calls start_kernel
|
|
je 1f
|
|
movl (stack_start), %esp
|
|
1:
|
|
#endif /* CONFIG_SMP */
|
|
jmp *(initial_code)
|
|
|
|
/*
|
|
* We depend on ET to be correct. This checks for 287/387.
|
|
*/
|
|
check_x87:
|
|
movb $0,X86_HARD_MATH
|
|
clts
|
|
fninit
|
|
fstsw %ax
|
|
cmpb $0,%al
|
|
je 1f
|
|
movl %cr0,%eax /* no coprocessor: have to set bits */
|
|
xorl $4,%eax /* set EM */
|
|
movl %eax,%cr0
|
|
ret
|
|
ALIGN
|
|
1: movb $1,X86_HARD_MATH
|
|
.byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
|
|
ret
|
|
|
|
/*
|
|
* setup_idt
|
|
*
|
|
* sets up a idt with 256 entries pointing to
|
|
* ignore_int, interrupt gates. It doesn't actually load
|
|
* idt - that can be done only after paging has been enabled
|
|
* and the kernel moved to PAGE_OFFSET. Interrupts
|
|
* are enabled elsewhere, when we can be relatively
|
|
* sure everything is ok.
|
|
*
|
|
* Warning: %esi is live across this function.
|
|
*/
|
|
setup_idt:
|
|
lea ignore_int,%edx
|
|
movl $(__KERNEL_CS << 16),%eax
|
|
movw %dx,%ax /* selector = 0x0010 = cs */
|
|
movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
|
|
|
|
lea idt_table,%edi
|
|
mov $256,%ecx
|
|
rp_sidt:
|
|
movl %eax,(%edi)
|
|
movl %edx,4(%edi)
|
|
addl $8,%edi
|
|
dec %ecx
|
|
jne rp_sidt
|
|
|
|
.macro set_early_handler handler,trapno
|
|
lea \handler,%edx
|
|
movl $(__KERNEL_CS << 16),%eax
|
|
movw %dx,%ax
|
|
movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
|
|
lea idt_table,%edi
|
|
movl %eax,8*\trapno(%edi)
|
|
movl %edx,8*\trapno+4(%edi)
|
|
.endm
|
|
|
|
set_early_handler handler=early_divide_err,trapno=0
|
|
set_early_handler handler=early_illegal_opcode,trapno=6
|
|
set_early_handler handler=early_protection_fault,trapno=13
|
|
set_early_handler handler=early_page_fault,trapno=14
|
|
|
|
ret
|
|
|
|
early_divide_err:
|
|
xor %edx,%edx
|
|
pushl $0 /* fake errcode */
|
|
jmp early_fault
|
|
|
|
early_illegal_opcode:
|
|
movl $6,%edx
|
|
pushl $0 /* fake errcode */
|
|
jmp early_fault
|
|
|
|
early_protection_fault:
|
|
movl $13,%edx
|
|
jmp early_fault
|
|
|
|
early_page_fault:
|
|
movl $14,%edx
|
|
jmp early_fault
|
|
|
|
early_fault:
|
|
cld
|
|
#ifdef CONFIG_PRINTK
|
|
pusha
|
|
movl $(__KERNEL_DS),%eax
|
|
movl %eax,%ds
|
|
movl %eax,%es
|
|
cmpl $2,early_recursion_flag
|
|
je hlt_loop
|
|
incl early_recursion_flag
|
|
movl %cr2,%eax
|
|
pushl %eax
|
|
pushl %edx /* trapno */
|
|
pushl $fault_msg
|
|
call printk
|
|
#endif
|
|
call dump_stack
|
|
hlt_loop:
|
|
hlt
|
|
jmp hlt_loop
|
|
|
|
/* This is the default interrupt "handler" :-) */
|
|
ALIGN
|
|
ignore_int:
|
|
cld
|
|
#ifdef CONFIG_PRINTK
|
|
pushl %eax
|
|
pushl %ecx
|
|
pushl %edx
|
|
pushl %es
|
|
pushl %ds
|
|
movl $(__KERNEL_DS),%eax
|
|
movl %eax,%ds
|
|
movl %eax,%es
|
|
cmpl $2,early_recursion_flag
|
|
je hlt_loop
|
|
incl early_recursion_flag
|
|
pushl 16(%esp)
|
|
pushl 24(%esp)
|
|
pushl 32(%esp)
|
|
pushl 40(%esp)
|
|
pushl $int_msg
|
|
call printk
|
|
|
|
call dump_stack
|
|
|
|
addl $(5*4),%esp
|
|
popl %ds
|
|
popl %es
|
|
popl %edx
|
|
popl %ecx
|
|
popl %eax
|
|
#endif
|
|
iret
|
|
|
|
__REFDATA
|
|
.align 4
|
|
ENTRY(initial_code)
|
|
.long i386_start_kernel
|
|
ENTRY(initial_page_table)
|
|
.long pa(swapper_pg_dir)
|
|
|
|
/*
|
|
* BSS section
|
|
*/
|
|
__PAGE_ALIGNED_BSS
|
|
.align PAGE_SIZE_asm
|
|
#ifdef CONFIG_X86_PAE
|
|
swapper_pg_pmd:
|
|
.fill 1024*KPMDS,4,0
|
|
#else
|
|
ENTRY(swapper_pg_dir)
|
|
.fill 1024,4,0
|
|
#endif
|
|
swapper_pg_fixmap:
|
|
.fill 1024,4,0
|
|
#ifdef CONFIG_X86_TRAMPOLINE
|
|
ENTRY(trampoline_pg_dir)
|
|
.fill 1024,4,0
|
|
#endif
|
|
ENTRY(empty_zero_page)
|
|
.fill 4096,1,0
|
|
|
|
/*
|
|
* This starts the data section.
|
|
*/
|
|
#ifdef CONFIG_X86_PAE
|
|
__PAGE_ALIGNED_DATA
|
|
/* Page-aligned for the benefit of paravirt? */
|
|
.align PAGE_SIZE_asm
|
|
ENTRY(swapper_pg_dir)
|
|
.long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
|
|
# if KPMDS == 3
|
|
.long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
|
|
.long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
|
|
.long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0
|
|
# elif KPMDS == 2
|
|
.long 0,0
|
|
.long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
|
|
.long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
|
|
# elif KPMDS == 1
|
|
.long 0,0
|
|
.long 0,0
|
|
.long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
|
|
# else
|
|
# error "Kernel PMDs should be 1, 2 or 3"
|
|
# endif
|
|
.align PAGE_SIZE_asm /* needs to be page-sized too */
|
|
#endif
|
|
|
|
.data
|
|
ENTRY(stack_start)
|
|
.long init_thread_union+THREAD_SIZE
|
|
.long __BOOT_DS
|
|
|
|
ready: .byte 0
|
|
|
|
early_recursion_flag:
|
|
.long 0
|
|
|
|
int_msg:
|
|
.asciz "Unknown interrupt or fault at: %p %p %p\n"
|
|
|
|
fault_msg:
|
|
/* fault info: */
|
|
.ascii "BUG: Int %d: CR2 %p\n"
|
|
/* pusha regs: */
|
|
.ascii " EDI %p ESI %p EBP %p ESP %p\n"
|
|
.ascii " EBX %p EDX %p ECX %p EAX %p\n"
|
|
/* fault frame: */
|
|
.ascii " err %p EIP %p CS %p flg %p\n"
|
|
.ascii "Stack: %p %p %p %p %p %p %p %p\n"
|
|
.ascii " %p %p %p %p %p %p %p %p\n"
|
|
.asciz " %p %p %p %p %p %p %p %p\n"
|
|
|
|
#include "../../x86/xen/xen-head.S"
|
|
|
|
/*
|
|
* The IDT and GDT 'descriptors' are a strange 48-bit object
|
|
* only used by the lidt and lgdt instructions. They are not
|
|
* like usual segment descriptors - they consist of a 16-bit
|
|
* segment size, and 32-bit linear address value:
|
|
*/
|
|
|
|
.globl boot_gdt_descr
|
|
.globl idt_descr
|
|
|
|
ALIGN
|
|
# early boot GDT descriptor (must use 1:1 address mapping)
|
|
.word 0 # 32 bit align gdt_desc.address
|
|
boot_gdt_descr:
|
|
.word __BOOT_DS+7
|
|
.long boot_gdt - __PAGE_OFFSET
|
|
|
|
.word 0 # 32-bit align idt_desc.address
|
|
idt_descr:
|
|
.word IDT_ENTRIES*8-1 # idt contains 256 entries
|
|
.long idt_table
|
|
|
|
# boot GDT descriptor (later on used by CPU#0):
|
|
.word 0 # 32 bit align gdt_desc.address
|
|
ENTRY(early_gdt_descr)
|
|
.word GDT_ENTRIES*8-1
|
|
.long gdt_page /* Overwritten for secondary CPUs */
|
|
|
|
/*
|
|
* The boot_gdt must mirror the equivalent in setup.S and is
|
|
* used only for booting.
|
|
*/
|
|
.align L1_CACHE_BYTES
|
|
ENTRY(boot_gdt)
|
|
.fill GDT_ENTRY_BOOT_CS,8,0
|
|
.quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
|
|
.quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
|