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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7ec80ddf04
Add Nuvoton W90X900 ARM9 plat support to linux arm tree, Now, this patch include only W90P910 EVB of W90P910 CPU, Its driver is nothing. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
77 lines
1.9 KiB
C
77 lines
1.9 KiB
C
/*
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* arch/arm/mach-w90x900/include/mach/map.h
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*
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* Copyright (c) 2008 Nuvoton technology corporation
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* All rights reserved.
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* Based on arch/arm/mach-s3c2410/include/mach/map.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#ifndef __ASM_ARCH_MAP_H
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#define __ASM_ARCH_MAP_H
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#ifndef __ASSEMBLY__
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#define W90X900_ADDR(x) ((void __iomem *)(0xF0000000 + (x)))
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#else
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#define W90X900_ADDR(x) (0xF0000000 + (x))
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#endif
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#define AHB_IO_BASE 0xB0000000
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#define APB_IO_BASE 0xB8000000
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#define CLOCKPW_BASE (APB_IO_BASE+0x200)
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#define AIC_IO_BASE (APB_IO_BASE+0x2000)
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#define TIMER_IO_BASE (APB_IO_BASE+0x1000)
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/*
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* interrupt controller is the first thing we put in, to make
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* the assembly code for the irq detection easier
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*/
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#define W90X900_VA_IRQ W90X900_ADDR(0x00000000)
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#define W90X900_PA_IRQ (0xB8002000)
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#define W90X900_SZ_IRQ SZ_4K
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#define W90X900_VA_GCR W90X900_ADDR(0x08002000)
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#define W90X900_PA_GCR (0xB0000000)
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#define W90X900_SZ_GCR SZ_4K
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/* Clock and Power management */
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#define W90X900_VA_CLKPWR (W90X900_VA_GCR+0x200)
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#define W90X900_PA_CLKPWR (0xB0000200)
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#define W90X900_SZ_CLKPWR SZ_4K
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/* EBI management */
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#define W90X900_VA_EBI W90X900_ADDR(0x00001000)
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#define W90X900_PA_EBI (0xB0001000)
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#define W90X900_SZ_EBI SZ_4K
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/* UARTs */
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#define W90X900_VA_UART W90X900_ADDR(0x08000000)
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#define W90X900_PA_UART (0xB8000000)
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#define W90X900_SZ_UART SZ_4K
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/* Timers */
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#define W90X900_VA_TIMER W90X900_ADDR(0x08001000)
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#define W90X900_PA_TIMER (0xB8001000)
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#define W90X900_SZ_TIMER SZ_4K
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/* GPIO ports */
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#define W90X900_VA_GPIO W90X900_ADDR(0x08003000)
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#define W90X900_PA_GPIO (0xB8003000)
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#define W90X900_SZ_GPIO SZ_4K
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#endif /* __ASM_ARCH_MAP_H */
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