Aneesh Kumar K.V 047e6575ae powerpc/mm: Fixup tlbie vs mtpidr/mtlpidr ordering issue on POWER9 ... On POWER9, under some circumstances, a broadcast TLB invalidation will fail to invalidate the ERAT cache on some threads when there are parallel mtpidr/mtlpidr happening on other threads of the same core. This can cause stores to continue to go to a page after it's unmapped. The workaround is to force an ERAT flush using PID=0 or LPID=0 tlbie flush. This additional TLB flush will cause the ERAT cache invalidation. Since we are using PID=0 or LPID=0, we don't get filtered out by the TLB snoop filtering logic. We need to still follow this up with another tlbie to take care of store vs tlbie ordering issue explained in commit: a5d4b5891c ("powerpc/mm: Fixup tlbie vs store ordering issue on POWER9"). The presence of ERAT cache implies we can still get new stores and they may miss store queue marking flush. Cc: stable@vger.kernel.org Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190924035254.24612-3-aneesh.kumar@linux.ibm.com		2019-09-24 20:58:55 +10:00
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book3s_32_mmu_host.c
book3s_32_mmu.c
book3s_32_sr.S
book3s_64_mmu_host.c
book3s_64_mmu_hv.c
book3s_64_mmu_radix.c
book3s_64_mmu.c
book3s_64_slb.S
book3s_64_vio_hv.c
book3s_64_vio.c
book3s_emulate.c
book3s_exports.c
book3s_hv_builtin.c
book3s_hv_hmi.c
book3s_hv_interrupts.S
book3s_hv_nested.c	powerpc/64s: Set reserved PCR bits	2019-09-21 08:36:53 +10:00
book3s_hv_ras.c
book3s_hv_rm_mmu.c	powerpc/mm: Fixup tlbie vs mtpidr/mtlpidr ordering issue on POWER9	2019-09-24 20:58:55 +10:00
book3s_hv_rm_xics.c	KVM: PPC: Book3S HV: use smp_mb() when setting/clearing host_ipi flag	2019-09-24 12:46:26 +10:00
book3s_hv_rm_xive.c
book3s_hv_rmhandlers.S	powerpc/64s: Set reserved PCR bits	2019-09-21 08:36:53 +10:00
book3s_hv_tm_builtin.c
book3s_hv_tm.c
book3s_hv.c	powerpc/64s: Set reserved PCR bits	2019-09-21 08:36:53 +10:00
book3s_interrupts.S
book3s_mmu_hpte.c
book3s_paired_singles.c
book3s_pr_papr.c
book3s_pr.c
book3s_rmhandlers.S
book3s_rtas.c
book3s_segment.S
book3s_xics.c
book3s_xics.h
book3s_xive_native.c
book3s_xive_template.c
book3s_xive.c
book3s_xive.h
book3s.c
book3s.h
booke_emulate.c
booke_interrupts.S
booke.c
booke.h
bookehv_interrupts.S
e500_emulate.c
e500_mmu_host.c
e500_mmu_host.h
e500_mmu.c
e500.c
e500.h
e500mc.c
emulate_loadstore.c
emulate.c
fpu.S
irq.h
Kconfig
Makefile
mpic.c
powerpc.c
timing.c
timing.h
tm.S
trace_book3s.h
trace_booke.h
trace_hv.h
trace_pr.h
trace.h