mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-26 15:09:29 +07:00
4bfc53038e
layerscape otg function should be supported HNP SRP and ADP protocol accroing to rm doc, but dwc3 code not realize it and use id pin to detect who is host or device(0 is host 1 is device) this patch is to enable OTG mode on ls1028ardb ls1088ardb and ls1046ardb in dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
191 lines
3.1 KiB
Plaintext
191 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Device Tree file for NXP LS1028A RDB Board.
|
|
*
|
|
* Copyright 2018 NXP
|
|
*
|
|
* Harninder Rai <harninder.rai@nxp.com>
|
|
*
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "fsl-ls1028a.dtsi"
|
|
|
|
/ {
|
|
model = "LS1028A RDB Board";
|
|
compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
|
|
|
|
aliases {
|
|
crypto = &crypto;
|
|
serial0 = &duart0;
|
|
serial1 = &duart1;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
reg = <0x0 0x80000000 0x1 0x0000000>;
|
|
};
|
|
|
|
sys_mclk: clock-mclk {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <25000000>;
|
|
};
|
|
|
|
reg_1p8v: regulator-1p8v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "1P8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sb_3v3: regulator-sb3v3 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "3v3_vbus";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sound {
|
|
compatible = "simple-audio-card";
|
|
simple-audio-card,format = "i2s";
|
|
simple-audio-card,widgets =
|
|
"Microphone", "Microphone Jack",
|
|
"Headphone", "Headphone Jack",
|
|
"Speaker", "Speaker Ext",
|
|
"Line", "Line In Jack";
|
|
simple-audio-card,routing =
|
|
"MIC_IN", "Microphone Jack",
|
|
"Microphone Jack", "Mic Bias",
|
|
"LINE_IN", "Line In Jack",
|
|
"Headphone Jack", "HP_OUT",
|
|
"Speaker Ext", "LINE_OUT";
|
|
|
|
simple-audio-card,cpu {
|
|
sound-dai = <&sai4>;
|
|
frame-master;
|
|
bitclock-master;
|
|
};
|
|
|
|
simple-audio-card,codec {
|
|
sound-dai = <&sgtl5000>;
|
|
frame-master;
|
|
bitclock-master;
|
|
system-clock-frequency = <25000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&esdhc {
|
|
sd-uhs-sdr104;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr25;
|
|
sd-uhs-sdr12;
|
|
status = "okay";
|
|
};
|
|
|
|
&esdhc1 {
|
|
mmc-hs200-1_8v;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
|
|
i2c-mux@77 {
|
|
compatible = "nxp,pca9847";
|
|
reg = <0x77>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
i2c@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x1>;
|
|
|
|
sgtl5000: audio-codec@a {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "fsl,sgtl5000";
|
|
reg = <0xa>;
|
|
VDDA-supply = <®_1p8v>;
|
|
VDDIO-supply = <®_1p8v>;
|
|
clocks = <&sys_mclk>;
|
|
sclk-strength = <3>;
|
|
};
|
|
};
|
|
|
|
i2c@2 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x02>;
|
|
|
|
current-monitor@40 {
|
|
compatible = "ti,ina220";
|
|
reg = <0x40>;
|
|
shunt-resistor = <500>;
|
|
};
|
|
};
|
|
|
|
i2c@3 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x3>;
|
|
|
|
temperature-sensor@4c {
|
|
compatible = "nxp,sa56004";
|
|
reg = <0x4c>;
|
|
vcc-supply = <&sb_3v3>;
|
|
};
|
|
|
|
rtc@51 {
|
|
compatible = "nxp,pcf2129";
|
|
reg = <0x51>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&duart0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&duart1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&enetc_port0 {
|
|
phy-handle = <&sgmii_phy0>;
|
|
phy-connection-type = "sgmii";
|
|
|
|
mdio {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
sgmii_phy0: ethernet-phy@2 {
|
|
reg = <0x2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&enetc_port1 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&sai4 {
|
|
status = "okay";
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb1 {
|
|
dr_mode = "otg";
|
|
};
|